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[PATCH 0/5] i2c: designware: Enable fast mode plus and high speed

Started byWeifeng Voon <weifeng.voon@intel.com>
First post2016-05-26 10:10 +0200
Last post2016-05-26 14:10 +0200
Articles 6 — 3 participants

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  [PATCH 0/5] i2c: designware: Enable fast mode plus and high speed Weifeng Voon <weifeng.voon@intel.com> - 2016-05-26 10:10 +0200
    [PATCH 2/5] i2c: designware: get fast plus and high speed *CNT configuration Weifeng Voon <weifeng.voon@intel.com> - 2016-05-26 10:10 +0200
    [PATCH 3/5] i2c: designware: Enable fast mode plus Weifeng Voon <weifeng.voon@intel.com> - 2016-05-26 10:10 +0200
    [PATCH 1/5] i2c: designware: Move clk_freq into struct dw_i2c_dev Weifeng Voon <weifeng.voon@intel.com> - 2016-05-26 10:10 +0200
    Re: [PATCH 0/5] i2c: designware: Enable fast mode plus and high  speed Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-05-26 13:00 +0200
    Re: [PATCH 0/5] i2c: designware: Enable fast mode plus and high speed Jarkko Nikula <jarkko.nikula@linux.intel.com> - 2016-05-26 14:10 +0200

#1407440 — [PATCH 0/5] i2c: designware: Enable fast mode plus and high speed

FromWeifeng Voon <weifeng.voon@intel.com>
Date2016-05-26 10:10 +0200
Subject[PATCH 0/5] i2c: designware: Enable fast mode plus and high speed
Message-ID<rCYwG-3W0-9@gated-at.bofh.it>
Enabled fast mode plus and high speed which supported by APL SoC.

Weifeng Voon (5):
  i2c: designware: Move clk_freq into struct dw_i2c_dev
  i2c: designware: get fast plus and high speed *CNT configuration
  i2c: designware: Enable fast mode plus
  i2c: designware: set the common config before the if else
  i2c: designware: Enable high speed mode

 drivers/i2c/busses/i2c-designware-core.c    | 33 +++++++++++++++++++++---
 drivers/i2c/busses/i2c-designware-core.h    | 12 +++++++++
 drivers/i2c/busses/i2c-designware-platdrv.c | 39 +++++++++++++++++++----------
 3 files changed, 68 insertions(+), 16 deletions(-)

-- 
1.9.1

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#1407441 — [PATCH 2/5] i2c: designware: get fast plus and high speed *CNT configuration

FromWeifeng Voon <weifeng.voon@intel.com>
Date2016-05-26 10:10 +0200
Subject[PATCH 2/5] i2c: designware: get fast plus and high speed *CNT configuration
Message-ID<rCYwG-3W0-21@gated-at.bofh.it>
In reply to#1407440
I2C designware controller can run at fast mode plus and high speed. This
patch adds the capability to get the HCNT, LCNT configuration via
FPCN (fast plus) and HSCN (high speed) ACPI method.

Signed-off-by: Weifeng Voon <weifeng.voon@intel.com>
---
 drivers/i2c/busses/i2c-designware-core.h    | 8 ++++++++
 drivers/i2c/busses/i2c-designware-platdrv.c | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 87d406e..1124240 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -61,6 +61,10 @@
  * @ss_lcnt: standard speed LCNT value
  * @fs_hcnt: fast speed HCNT value
  * @fs_lcnt: fast speed LCNT value
+ * @fp_hcnt: fast plus HCNT value
+ * @fp_lcnt: fast plus LCNT value
+ * @hs_hcnt: high speed HCNT value
+ * @hs_lcnt: high speed LCNT value
  * @acquire_lock: function to acquire a hardware lock on the bus
  * @release_lock: function to release a hardware lock on the bus
  * @pm_runtime_disabled: true if pm runtime is disabled
@@ -104,6 +108,10 @@ struct dw_i2c_dev {
 	u16			ss_lcnt;
 	u16			fs_hcnt;
 	u16			fs_lcnt;
+	u16			fp_hcnt;
+	u16			fp_lcnt;
+	u16			hs_hcnt;
+	u16			hs_lcnt;
 	int			(*acquire_lock)(struct dw_i2c_dev *dev);
 	void			(*release_lock)(struct dw_i2c_dev *dev);
 	bool			pm_runtime_disabled;
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 1608cf4..cbe4fb3 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -107,6 +107,8 @@ static int dw_i2c_acpi_configure(struct platform_device *pdev)
 	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, NULL);
 	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt,
 			   &dev->sda_hold_time);
+	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, NULL);
+	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, NULL);
 
 	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
 	if (id && id->driver_data)
-- 
1.9.1

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#1407442 — [PATCH 3/5] i2c: designware: Enable fast mode plus

FromWeifeng Voon <weifeng.voon@intel.com>
Date2016-05-26 10:10 +0200
Subject[PATCH 3/5] i2c: designware: Enable fast mode plus
Message-ID<rCYwG-3W0-19@gated-at.bofh.it>
In reply to#1407440
This patch enabled fast mode plus. The fast mode plus and fast speed
share the same HCNT and LCNT register. So, the fast mode plus will only
run when the HCNT and LCNT value is provided. Else, it will run at fast
speed as default.

Signed-off-by: Weifeng Voon <weifeng.voon@intel.com>
---
 drivers/i2c/busses/i2c-designware-core.c    | 7 +++++--
 drivers/i2c/busses/i2c-designware-platdrv.c | 9 ++++++---
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 99b54be..25c78d2 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -347,8 +347,11 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
 	dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
 	dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
 
-	/* Set SCL timing parameters for fast-mode */
-	if (dev->fs_hcnt && dev->fs_lcnt) {
+	/* Set SCL timing parameters for fast-mode or fast-mode plus */
+	if ((dev->clk_freq == 1000000) && dev->fp_hcnt && dev->fp_lcnt) {
+		hcnt = dev->fp_hcnt;
+		lcnt = dev->fp_lcnt;
+	} else if (dev->fs_hcnt && dev->fs_lcnt) {
 		hcnt = dev->fs_hcnt;
 		lcnt = dev->fs_lcnt;
 	} else {
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index cbe4fb3..ea92e9f 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -196,10 +196,13 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 		dw_i2c_acpi_configure(pdev);
 
 	/*
-	 * Only standard mode at 100kHz and fast mode at 400kHz are supported.
+	 * Only standard mode at 100kHz, fast mode at 400kHz,
+	 * and fast mode plus at 1MHz are supported.
 	 */
-	if (dev->clk_freq != 100000 && dev->clk_freq != 400000) {
-		dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
+	if (dev->clk_freq != 100000 && dev->clk_freq != 400000
+	    && dev->clk_freq != 1000000) {
+		dev_err(&pdev->dev,
+			"Only 100kHz, 400kHz and 1MHz are supported");
 		return -EINVAL;
 	}
 
-- 
1.9.1

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#1407445 — [PATCH 1/5] i2c: designware: Move clk_freq into struct dw_i2c_dev

FromWeifeng Voon <weifeng.voon@intel.com>
Date2016-05-26 10:10 +0200
Subject[PATCH 1/5] i2c: designware: Move clk_freq into struct dw_i2c_dev
Message-ID<rCYwH-3W0-27@gated-at.bofh.it>
In reply to#1407440
I2c designware controller operate speed is configured in the register
IC_CON. Previously the operate speed is determined by a local variable
clk_freq. This patch will move the local variable clk_freq into struct
dw_i2c_dev. This change will ease the set and get of the clk_freq.

Signed-off-by: Weifeng Voon <weifeng.voon@intel.com>
---
 drivers/i2c/busses/i2c-designware-core.h    |  2 ++
 drivers/i2c/busses/i2c-designware-platdrv.c | 12 ++++++------
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index cd409e7..87d406e 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -56,6 +56,7 @@
  * @tx_fifo_depth: depth of the hardware tx fifo
  * @rx_fifo_depth: depth of the hardware rx fifo
  * @rx_outstanding: current master-rx elements in tx fifo
+ * @clk_freq: bus clock frequency
  * @ss_hcnt: standard speed HCNT value
  * @ss_lcnt: standard speed LCNT value
  * @fs_hcnt: fast speed HCNT value
@@ -95,6 +96,7 @@ struct dw_i2c_dev {
 	unsigned int		tx_fifo_depth;
 	unsigned int		rx_fifo_depth;
 	int			rx_outstanding;
+	u32			clk_freq;
 	u32			sda_hold_time;
 	u32			sda_falling_time;
 	u32			scl_falling_time;
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index d656657..1608cf4 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -155,7 +155,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 	struct i2c_adapter *adap;
 	struct resource *mem;
 	int irq, r;
-	u32 clk_freq, ht = 0;
+	u32 ht = 0;
 
 	irq = platform_get_irq(pdev, 0);
 	if (irq < 0)
@@ -175,10 +175,10 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, dev);
 
 	/* fast mode by default because of legacy reasons */
-	clk_freq = 400000;
+	dev->clk_freq = 400000;
 
 	if (pdata) {
-		clk_freq = pdata->i2c_scl_freq;
+		dev->clk_freq = pdata->i2c_scl_freq;
 	} else {
 		device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
 					 &ht);
@@ -187,7 +187,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 		device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
 					 &dev->scl_falling_time);
 		device_property_read_u32(&pdev->dev, "clock-frequency",
-					 &clk_freq);
+					 &dev->clk_freq);
 	}
 
 	if (has_acpi_companion(&pdev->dev))
@@ -196,7 +196,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 	/*
 	 * Only standard mode at 100kHz and fast mode at 400kHz are supported.
 	 */
-	if (clk_freq != 100000 && clk_freq != 400000) {
+	if (dev->clk_freq != 100000 && dev->clk_freq != 400000) {
 		dev_err(&pdev->dev, "Only 100kHz and 400kHz supported");
 		return -EINVAL;
 	}
@@ -212,7 +212,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
 		I2C_FUNC_SMBUS_BYTE_DATA |
 		I2C_FUNC_SMBUS_WORD_DATA |
 		I2C_FUNC_SMBUS_I2C_BLOCK;
-	if (clk_freq == 100000)
+	if (dev->clk_freq == 100000)
 		dev->master_cfg =  DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
 			DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD;
 	else
-- 
1.9.1

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#1407517 — Re: [PATCH 0/5] i2c: designware: Enable fast mode plus and high speed

FromAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Date2016-05-26 13:00 +0200
SubjectRe: [PATCH 0/5] i2c: designware: Enable fast mode plus and high speed
Message-ID<rD1bc-5oe-11@gated-at.bofh.it>
In reply to#1407440
On Thu, 2016-05-26 at 16:01 +0800, Weifeng Voon wrote:
> Enabled fast mode plus and high speed which supported by APL SoC.
> 

FWIW:
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

> Weifeng Voon (5):
>   i2c: designware: Move clk_freq into struct dw_i2c_dev
>   i2c: designware: get fast plus and high speed *CNT configuration
>   i2c: designware: Enable fast mode plus
>   i2c: designware: set the common config before the if else
>   i2c: designware: Enable high speed mode
> 
>  drivers/i2c/busses/i2c-designware-core.c    | 33
> +++++++++++++++++++++---
>  drivers/i2c/busses/i2c-designware-core.h    | 12 +++++++++
>  drivers/i2c/busses/i2c-designware-platdrv.c | 39 +++++++++++++++++++-
> ---------
>  3 files changed, 68 insertions(+), 16 deletions(-)
> 

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

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#1407535

FromJarkko Nikula <jarkko.nikula@linux.intel.com>
Date2016-05-26 14:10 +0200
Message-ID<rD2gV-6hy-9@gated-at.bofh.it>
In reply to#1407440
On 05/26/2016 11:01 AM, Weifeng Voon wrote:
> Enabled fast mode plus and high speed which supported by APL SoC.
>
> Weifeng Voon (5):
>    i2c: designware: Move clk_freq into struct dw_i2c_dev
>    i2c: designware: get fast plus and high speed *CNT configuration
>    i2c: designware: Enable fast mode plus
>    i2c: designware: set the common config before the if else
>    i2c: designware: Enable high speed mode
>
>   drivers/i2c/busses/i2c-designware-core.c    | 33 +++++++++++++++++++++---
>   drivers/i2c/busses/i2c-designware-core.h    | 12 +++++++++
>   drivers/i2c/busses/i2c-designware-platdrv.c | 39 +++++++++++++++++++----------
>   3 files changed, 68 insertions(+), 16 deletions(-)
>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

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