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[PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1

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  [PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1 Yu-cheng Yu <yu-cheng.yu@intel.com> - 2016-05-12 18:40 +0200
    [PATCH 4/4] x86/fpu/xstate: Copy xstate registers directly to signal frame when compacted format is in use Yu-cheng Yu <yu-cheng.yu@intel.com> - 2016-05-12 18:40 +0200
    [PATCH 1/4] x86/fpu/xstate: Define and use fpu_user_xstate_size Yu-cheng Yu <yu-cheng.yu@intel.com> - 2016-05-12 18:40 +0200
    [PATCH 3/4] x86/fpu/xstate: Keep init_fpstate.xsave.header.xfeatures as zero for init optimization Yu-cheng Yu <yu-cheng.yu@intel.com> - 2016-05-12 18:50 +0200
    Re: [PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1 Ingo Molnar <mingo@kernel.org> - 2016-05-20 09:20 +0200
      Re: [PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1 Yu-cheng Yu <yu-cheng.yu@intel.com> - 2016-05-20 17:50 +0200
        Re: [PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1 Ingo Molnar <mingo@kernel.org> - 2016-05-20 19:50 +0200
      Re: [PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1 Yu-cheng Yu <yu-cheng.yu@intel.com> - 2016-05-20 19:00 +0200

#1400231 — [PATCH 0/4] x86/fpu/state: Fix XSAVES issues - Part 1

This is Part 1 of previous 13 XSAVES patches. Break it down to
smaller series. There are no code changes; only minor fixes in
the titles.

Fenghua Yu (3):
  x86/fpu/xstate: Define and use fpu_user_xstate_size
  x86/fpu/xstate: Rename xstate_size to fpu_kernel_xstate_size to
    distinguish from fpu_user_xstate_size
  x86/fpu/xstate: Keep init_fpstate.xsave.header.xfeatures as zero for
    init optimization

Yu-cheng Yu (1):
  x86/fpu/xstate: Copy xstate registers directly to signal frame when
    compacted format is in use

 arch/x86/include/asm/fpu/xstate.h |  2 +-
 arch/x86/include/asm/processor.h  |  3 +-
 arch/x86/kernel/fpu/core.c        |  7 +--
 arch/x86/kernel/fpu/init.c        | 21 +++++----
 arch/x86/kernel/fpu/signal.c      | 32 ++++++++++----
 arch/x86/kernel/fpu/xstate.c      | 92 +++++++++++++++++++++++----------------
 6 files changed, 98 insertions(+), 59 deletions(-)

-- 
1.9.1

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#1400233 — [PATCH 4/4] x86/fpu/xstate: Copy xstate registers directly to signal frame when compacted format is in use

XSAVES is a kernel instruction and uses a compacted format. When working
with user space, the kernel should provide standard-format, non-supervisor
state data. We cannot do __copy_to_user() from a compacted-format kernel
xstate area to a signal frame.

Dave Hansen proposes this method to simplify copy xstate directly to user.
Based on an earlier patch from Fenghua Yu <fenghua.yu@intel.com>

Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
---
 arch/x86/include/asm/fpu/xstate.h | 1 +
 arch/x86/kernel/fpu/signal.c      | 3 ++-
 arch/x86/kernel/fpu/xstate.c      | 2 +-
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h
index 16df2c4..d812cf3 100644
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -47,5 +47,6 @@ extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
 void fpu__xstate_clear_all_cpu_caps(void);
 void *get_xsave_addr(struct xregs_state *xsave, int xstate);
 const void *get_xsave_field_ptr(int xstate_field);
+int using_compacted_format(void);
 
 #endif
diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index 1454989..9ce2963 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -8,6 +8,7 @@
 #include <asm/fpu/internal.h>
 #include <asm/fpu/signal.h>
 #include <asm/fpu/regset.h>
+#include <asm/fpu/xstate.h>
 
 #include <asm/sigframe.h>
 
@@ -168,7 +169,7 @@ int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
 			sizeof(struct user_i387_ia32_struct), NULL,
 			(struct _fpstate_32 __user *) buf) ? -1 : 1;
 
-	if (fpregs_active()) {
+	if (fpregs_active() || using_compacted_format()) {
 		/* Save the live register state to the user directly. */
 		if (copy_fpregs_to_sigframe(buf_fx))
 			return -1;
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 5239d4d..e00ec6a 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -420,7 +420,7 @@ static int xfeature_size(int xfeature_nr)
  * that it is obvious which aspect of 'XSAVES' is being handled
  * by the calling code.
  */
-static int using_compacted_format(void)
+int using_compacted_format(void)
 {
 	return cpu_has_xsaves;
 }
-- 
1.9.1

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#1400234 — [PATCH 1/4] x86/fpu/xstate: Define and use fpu_user_xstate_size

From: Fenghua Yu <fenghua.yu@intel.com>

The kernel xstate area can be in standard or compacted format;
it is always in standard format for user mode. When XSAVES is
enabled, the kernel uses the compacted format and it is necessary
to use a separate fpu_user_xstate_size for signal/ptrace frames.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
[yu-cheng.yu@intel.com: rebase to current, rename to fpu_user_xstate_size]
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
---
 arch/x86/include/asm/fpu/xstate.h |  1 -
 arch/x86/include/asm/processor.h  |  1 +
 arch/x86/kernel/fpu/init.c        |  5 ++-
 arch/x86/kernel/fpu/signal.c      | 27 ++++++++++----
 arch/x86/kernel/fpu/xstate.c      | 76 ++++++++++++++++++++++++---------------
 5 files changed, 73 insertions(+), 37 deletions(-)

diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h
index 38951b0..16df2c4 100644
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -39,7 +39,6 @@
 #define REX_PREFIX
 #endif
 
-extern unsigned int xstate_size;
 extern u64 xfeatures_mask;
 extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
 
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 9264476..8d5df3f 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -368,6 +368,7 @@ DECLARE_PER_CPU(struct irq_stack *, softirq_stack);
 #endif	/* X86_64 */
 
 extern unsigned int xstate_size;
+extern unsigned int fpu_user_xstate_size;
 
 struct perf_event;
 
diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c
index 54c86ff..824d422 100644
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -195,7 +195,7 @@ static void __init fpu__init_task_struct_size(void)
 }
 
 /*
- * Set up the xstate_size based on the legacy FPU context size.
+ * Set up the user and kernel xstate_size based on the legacy FPU context size.
  *
  * We set this up first, and later it will be overwritten by
  * fpu__init_system_xstate() if the CPU knows about xstates.
@@ -226,6 +226,9 @@ static void __init fpu__init_system_xstate_size_legacy(void)
 		else
 			xstate_size = sizeof(struct fregs_state);
 	}
+
+	fpu_user_xstate_size = xstate_size;
+
 	/*
 	 * Quirk: we don't yet handle the XSAVES* instructions
 	 * correctly, as we don't correctly convert between
diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index 31c6a60..23572a9 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -31,7 +31,7 @@ static inline int check_for_xstate(struct fxregs_state __user *buf,
 	/* Check for the first magic field and other error scenarios. */
 	if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
 	    fx_sw->xstate_size < min_xstate_size ||
-	    fx_sw->xstate_size > xstate_size ||
+	    fx_sw->xstate_size > fpu_user_xstate_size ||
 	    fx_sw->xstate_size > fx_sw->extended_size)
 		return -1;
 
@@ -88,7 +88,8 @@ static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
 	if (!use_xsave())
 		return err;
 
-	err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));
+	err |= __put_user(FP_XSTATE_MAGIC2,
+			  (__u32 *)(buf + fpu_user_xstate_size));
 
 	/*
 	 * Read the xfeatures which we copied (directly from the cpu or
@@ -125,7 +126,7 @@ static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf)
 	else
 		err = copy_fregs_to_user((struct fregs_state __user *) buf);
 
-	if (unlikely(err) && __clear_user(buf, xstate_size))
+	if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size))
 		err = -EFAULT;
 	return err;
 }
@@ -175,8 +176,19 @@ int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
 		if (ia32_fxstate)
 			copy_fxregs_to_kernel(&tsk->thread.fpu);
 	} else {
+		/*
+		 * It is a *bug* if kernel uses compacted-format for xsave
+		 * area and we copy it out directly to a signal frame. It
+		 * should have been handled above by saving the registers
+		 * directly.
+		 */
+		if (boot_cpu_has(X86_FEATURE_XSAVES)) {
+			WARN_ONCE(1, "x86/fpu: saving compacted-format xsave area to a signal frame!\n");
+			return -1;
+		}
+
 		fpstate_sanitize_xstate(&tsk->thread.fpu);
-		if (__copy_to_user(buf_fx, xsave, xstate_size))
+		if (__copy_to_user(buf_fx, xsave, fpu_user_xstate_size))
 			return -1;
 	}
 
@@ -341,7 +353,8 @@ static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
 
 static inline int xstate_sigframe_size(void)
 {
-	return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;
+	return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE :
+			fpu_user_xstate_size;
 }
 
 /*
@@ -385,12 +398,12 @@ fpu__alloc_mathframe(unsigned long sp, int ia32_frame,
  */
 void fpu__init_prepare_fx_sw_frame(void)
 {
-	int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;
+	int size = fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE;
 
 	fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
 	fx_sw_reserved.extended_size = size;
 	fx_sw_reserved.xfeatures = xfeatures_mask;
-	fx_sw_reserved.xstate_size = xstate_size;
+	fx_sw_reserved.xstate_size = fpu_user_xstate_size;
 
 	if (config_enabled(CONFIG_IA32_EMULATION) ||
 	    config_enabled(CONFIG_X86_32)) {
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index b48ef35..dfac87d 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -44,6 +44,13 @@ static unsigned int xstate_sizes[XFEATURE_MAX]   = { [ 0 ... XFEATURE_MAX - 1] =
 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
 
 /*
+ * The XSAVE area of kernel can be in standard or compacted format;
+ * it is always in standard format for user mode. This is the user
+ * mode standard format size used for signal and ptrace frames.
+ */
+unsigned int fpu_user_xstate_size;
+
+/*
  * Clear all of the X86_FEATURE_* bits that are unavailable
  * when the CPU has no XSAVE support.
  */
@@ -171,7 +178,7 @@ void fpstate_sanitize_xstate(struct fpu *fpu)
 	 */
 	while (xfeatures) {
 		if (xfeatures & 0x1) {
-			int offset = xstate_offsets[feature_bit];
+			int offset = xstate_comp_offsets[feature_bit];
 			int size = xstate_sizes[feature_bit];
 
 			memcpy((void *)fx + offset,
@@ -533,8 +540,9 @@ static void do_extra_xstate_size_checks(void)
 	XSTATE_WARN_ON(paranoid_xstate_size != xstate_size);
 }
 
+
 /*
- * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
+ * Get total size of enabled xstates in XCR0/xfeatures_mask.
  *
  * Note the SDM's wording here.  "sub-function 0" only enumerates
  * the size of the *user* states.  If we use it to size a buffer
@@ -544,34 +552,33 @@ static void do_extra_xstate_size_checks(void)
  * Note that we do not currently set any bits on IA32_XSS so
  * 'XCR0 | IA32_XSS == XCR0' for now.
  */
-static unsigned int __init calculate_xstate_size(void)
+static unsigned int __init get_xsaves_size(void)
 {
 	unsigned int eax, ebx, ecx, edx;
-	unsigned int calculated_xstate_size;
+	/*
+	 * - CPUID function 0DH, sub-function 1:
+	 *    EBX enumerates the size (in bytes) required by
+	 *    the XSAVES instruction for an XSAVE area
+	 *    containing all the state components
+	 *    corresponding to bits currently set in
+	 *    XCR0 | IA32_XSS.
+	 */
+	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
+	return ebx;
+}
 
-	if (!cpu_has_xsaves) {
-		/*
-		 * - CPUID function 0DH, sub-function 0:
-		 *    EBX enumerates the size (in bytes) required by
-		 *    the XSAVE instruction for an XSAVE area
-		 *    containing all the *user* state components
-		 *    corresponding to bits currently set in XCR0.
-		 */
-		cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
-		calculated_xstate_size = ebx;
-	} else {
-		/*
-		 * - CPUID function 0DH, sub-function 1:
-		 *    EBX enumerates the size (in bytes) required by
-		 *    the XSAVES instruction for an XSAVE area
-		 *    containing all the state components
-		 *    corresponding to bits currently set in
-		 *    XCR0 | IA32_XSS.
-		 */
-		cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
-		calculated_xstate_size = ebx;
-	}
-	return calculated_xstate_size;
+static unsigned int __init get_xsave_size(void)
+{
+	unsigned int eax, ebx, ecx, edx;
+	/*
+	 * - CPUID function 0DH, sub-function 0:
+	 *    EBX enumerates the size (in bytes) required by
+	 *    the XSAVE instruction for an XSAVE area
+	 *    containing all the *user* state components
+	 *    corresponding to bits currently set in XCR0.
+	 */
+	cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
+	return ebx;
 }
 
 /*
@@ -591,7 +598,15 @@ static bool is_supported_xstate_size(unsigned int test_xstate_size)
 static int init_xstate_size(void)
 {
 	/* Recompute the context size for enabled features: */
-	unsigned int possible_xstate_size = calculate_xstate_size();
+	unsigned int possible_xstate_size;
+	unsigned int xsave_size;
+
+	xsave_size = get_xsave_size();
+
+	if (cpu_has_xsaves)
+		possible_xstate_size = get_xsaves_size();
+	else
+		possible_xstate_size = xsave_size;
 
 	/* Ensure we have the space to store all enabled: */
 	if (!is_supported_xstate_size(possible_xstate_size))
@@ -603,6 +618,11 @@ static int init_xstate_size(void)
 	 */
 	xstate_size = possible_xstate_size;
 	do_extra_xstate_size_checks();
+
+	/*
+	 * User space is always in standard format.
+	 */
+	fpu_user_xstate_size = xsave_size;
 	return 0;
 }
 
-- 
1.9.1

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#1400237 — [PATCH 3/4] x86/fpu/xstate: Keep init_fpstate.xsave.header.xfeatures as zero for init optimization

From: Fenghua Yu <fenghua.yu@intel.com>

Keep init_fpstate.xsave.header.xfeatures as zero for init optimization.
This is important for init optimization that is implemented in processor.
If a bit corresponding to an xstate in xstate_bv is 0, it means the
xstate is in init status and will not be read from memory to the processor
during XRSTOR/XRSTORS instruction. This largely impacts context switch
performance.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
---
 arch/x86/kernel/fpu/xstate.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 875afe9..5239d4d 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -329,13 +329,11 @@ static void __init setup_init_fpu_buf(void)
 	setup_xstate_features();
 	print_xstate_features();
 
-	if (cpu_has_xsaves) {
+	if (cpu_has_xsaves)
 		init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
-		init_fpstate.xsave.header.xfeatures = xfeatures_mask;
-	}
 
 	/*
-	 * Init all the features state with header_bv being 0x0
+	 * Init all the features state with header.xfeatures being 0x0
 	 */
 	copy_kernel_to_xregs_booting(&init_fpstate.xsave);
 
-- 
1.9.1

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#1404191

* Yu-cheng Yu <yu-cheng.yu@intel.com> wrote:

> This is Part 1 of previous 13 XSAVES patches. Break it down to
> smaller series. There are no code changes; only minor fixes in
> the titles.
> 
> Fenghua Yu (3):
>   x86/fpu/xstate: Define and use fpu_user_xstate_size
>   x86/fpu/xstate: Rename xstate_size to fpu_kernel_xstate_size to
>     distinguish from fpu_user_xstate_size
>   x86/fpu/xstate: Keep init_fpstate.xsave.header.xfeatures as zero for
>     init optimization
> 
> Yu-cheng Yu (1):
>   x86/fpu/xstate: Copy xstate registers directly to signal frame when
>     compacted format is in use
> 
>  arch/x86/include/asm/fpu/xstate.h |  2 +-
>  arch/x86/include/asm/processor.h  |  3 +-
>  arch/x86/kernel/fpu/core.c        |  7 +--
>  arch/x86/kernel/fpu/init.c        | 21 +++++----
>  arch/x86/kernel/fpu/signal.c      | 32 ++++++++++----
>  arch/x86/kernel/fpu/xstate.c      | 92 +++++++++++++++++++++++----------------
>  6 files changed, 98 insertions(+), 59 deletions(-)

Hm, the series does not apply cleanly:

 patching file arch/x86/include/asm/fpu/xstate.h
 patching file arch/x86/include/asm/processor.h
 patching file arch/x86/kernel/fpu/init.c
 patching file arch/x86/kernel/fpu/signal.c
 patching file arch/x86/kernel/fpu/xstate.c
 Hunk #4 FAILED at 552.
 1 out of 6 hunks FAILED -- rejects in file arch/x86/kernel/fpu/xstate.c

which suggests that this series isn't against a recent x86 tree, right?

Thanks,

	Ingo

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#1404556

On Fri, May 20, 2016 at 09:12:00AM +0200, Ingo Molnar wrote:
> Hm, the series does not apply cleanly:
> 
>  patching file arch/x86/include/asm/fpu/xstate.h
>  patching file arch/x86/include/asm/processor.h
>  patching file arch/x86/kernel/fpu/init.c
>  patching file arch/x86/kernel/fpu/signal.c
>  patching file arch/x86/kernel/fpu/xstate.c
>  Hunk #4 FAILED at 552.
>  1 out of 6 hunks FAILED -- rejects in file arch/x86/kernel/fpu/xstate.c
> 
> which suggests that this series isn't against a recent x86 tree, right?

That was based on the latest upstream kernel.  I also keep a version based
on tip/master.  Would it work?

Yu-cheng

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#1404650

* Yu-cheng Yu <yu-cheng.yu@intel.com> wrote:

> On Fri, May 20, 2016 at 09:12:00AM +0200, Ingo Molnar wrote:
> > Hm, the series does not apply cleanly:
> > 
> >  patching file arch/x86/include/asm/fpu/xstate.h
> >  patching file arch/x86/include/asm/processor.h
> >  patching file arch/x86/kernel/fpu/init.c
> >  patching file arch/x86/kernel/fpu/signal.c
> >  patching file arch/x86/kernel/fpu/xstate.c
> >  Hunk #4 FAILED at 552.
> >  1 out of 6 hunks FAILED -- rejects in file arch/x86/kernel/fpu/xstate.c
> > 
> > which suggests that this series isn't against a recent x86 tree, right?
> 
> That was based on the latest upstream kernel.  I also keep a version based
> on tip/master.  Would it work?

Yes, tip/master would be fine, or upstream bc231d9ede99 that has the x86 tree 
already merged.

Thanks,

	Ingo.

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#1404614

On Fri, May 20, 2016 at 09:12:00AM +0200, Ingo Molnar wrote:
>  patching file arch/x86/include/asm/fpu/xstate.h
>  patching file arch/x86/include/asm/processor.h
>  patching file arch/x86/kernel/fpu/init.c
>  patching file arch/x86/kernel/fpu/signal.c
>  patching file arch/x86/kernel/fpu/xstate.c
>  Hunk #4 FAILED at 552.
>  1 out of 6 hunks FAILED -- rejects in file arch/x86/kernel/fpu/xstate.c
> 
> which suggests that this series isn't against a recent x86 tree, right?

There are differences in tip/master and tip/x86/core.  The main thing is
using boot_cpu_has(X86_FEATURE_XSAVES) or cpu_has_xsaves.  My understanding
is boot_cpu_has() is where we are going and basing on tip/master is easier for
merging?

Thanks,
Yu-cheng
 

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