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| Started by | Rich Felker <dalias@libc.org> |
|---|---|
| First post | 2016-05-20 05:00 +0200 |
| Last post | 2016-05-21 00:50 +0200 |
| Articles | 3 — 2 participants |
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[PATCH v2 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board Rich Felker <dalias@libc.org> - 2016-05-20 05:00 +0200
Re: [PATCH v2 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board Geert Uytterhoeven <geert@linux-m68k.org> - 2016-05-20 10:20 +0200
Re: [PATCH v2 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board Rich Felker <dalias@libc.org> - 2016-05-21 00:50 +0200
| From | Rich Felker <dalias@libc.org> |
|---|---|
| Date | 2016-05-20 05:00 +0200 |
| Subject | [PATCH v2 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board |
| Message-ID | <rAIPo-8gr-15@gated-at.bofh.it> |
Signed-off-by: Rich Felker <dalias@libc.org>
---
arch/sh/boot/dts/j2_mimas_v2.dts | 87 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 87 insertions(+)
create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts
diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts
new file mode 100755
index 0000000..f47fb2f
--- /dev/null
+++ b/arch/sh/boot/dts/j2_mimas_v2.dts
@@ -0,0 +1,87 @@
+/dts-v1/;
+
+/ {
+ compatible = "jcore,j2-soc";
+ model = "J2 FPGA SoC on Mimas v2 board";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&aic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "jcore,j2";
+ reg = < 0 >;
+ clock-frequency = < 50000000 >;
+ };
+ };
+
+ memory@10000000 {
+ device_type = "memory";
+ reg = < 0x10000000 0x4000000 >;
+ };
+
+ chosen {
+ stdout-path = "/soc@abcd0000/serial@100";
+ };
+
+ soc@abcd0000 {
+ compatible = "simple-bus";
+ ranges = <0 0xabcd0000 0x100000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aic: interrupt-controller {
+ compatible = "jcore,aic1";
+ reg = < 0x200 0x10 >;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ cache-controller {
+ compatible = "jcore,cache";
+ reg = < 0xc0 4 >;
+ };
+
+ timer {
+ compatible = "jcore,pit";
+ reg = < 0x200 0x30 >;
+ interrupts = < 0x48 >;
+ };
+
+ spi {
+ compatible = "jcore,spi2";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spi-max-frequency = <12500000>;
+
+ reg = < 0x40 0x8 >;
+
+ sdcard@1 {
+ compatible = "mmc-spi-slot";
+ reg = <0>;
+ spi-max-frequency = <12500000>;
+ voltage-ranges = <3200 3400>;
+ mode = <0>;
+ };
+ };
+
+ serial@100 {
+ clock-frequency = <125000000>;
+ compatible = "xlnx,xps-uartlite-1.00.a";
+ current-speed = <19200>;
+ device_type = "serial";
+ interrupts = < 0x12 >;
+ port-number = <0>;
+ reg = < 0x100 0x10 >;
+ };
+ };
+};
--
2.8.1
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| From | Geert Uytterhoeven <geert@linux-m68k.org> |
|---|---|
| Date | 2016-05-20 10:20 +0200 |
| Subject | Re: [PATCH v2 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board |
| Message-ID | <rANP4-35u-23@gated-at.bofh.it> |
| In reply to | #1404087 |
On Fri, May 20, 2016 at 4:53 AM, Rich Felker <dalias@libc.org> wrote:
> --- /dev/null
> +++ b/arch/sh/boot/dts/j2_mimas_v2.dts
> @@ -0,0 +1,87 @@
> +/dts-v1/;
> +
> +/ {
> + compatible = "jcore,j2-soc";
> + model = "J2 FPGA SoC on Mimas v2 board";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + interrupt-parent = <&aic>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "jcore,j2";
> + reg = < 0 >;
> + clock-frequency = < 50000000 >;
> + };
> + };
> +
> + memory@10000000 {
> + device_type = "memory";
> + reg = < 0x10000000 0x4000000 >;
> + };
> +
> + chosen {
> + stdout-path = "/soc@abcd0000/serial@100";
> + };
> +
> + soc@abcd0000 {
> + compatible = "simple-bus";
> + ranges = <0 0xabcd0000 0x100000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + aic: interrupt-controller {
aic: interrupt-controller@200 {
> + compatible = "jcore,aic1";
> + reg = < 0x200 0x10 >;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> +
> + cache-controller {
@c0
> + compatible = "jcore,cache";
> + reg = < 0xc0 4 >;
> + };
> +
> + timer {
@200
> + compatible = "jcore,pit";
> + reg = < 0x200 0x30 >;
> + interrupts = < 0x48 >;
> + };
> +
> + spi {
@40
> + compatible = "jcore,spi2";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + spi-max-frequency = <12500000>;
> +
> + reg = < 0x40 0x8 >;
> +
> + sdcard@1 {
@0, to match reg below?
> + compatible = "mmc-spi-slot";
> + reg = <0>;
> + spi-max-frequency = <12500000>;
> + voltage-ranges = <3200 3400>;
> + mode = <0>;
> + };
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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| From | Rich Felker <dalias@libc.org> |
|---|---|
| Date | 2016-05-21 00:50 +0200 |
| Subject | Re: [PATCH v2 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board |
| Message-ID | <rB1p0-3zb-9@gated-at.bofh.it> |
| In reply to | #1404227 |
On Fri, May 20, 2016 at 10:17:34AM +0200, Geert Uytterhoeven wrote:
> On Fri, May 20, 2016 at 4:53 AM, Rich Felker <dalias@libc.org> wrote:
> > --- /dev/null
> > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts
> > @@ -0,0 +1,87 @@
> > +/dts-v1/;
> > +
> > +/ {
> > + compatible = "jcore,j2-soc";
> > + model = "J2 FPGA SoC on Mimas v2 board";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + interrupt-parent = <&aic>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu@0 {
> > + device_type = "cpu";
> > + compatible = "jcore,j2";
> > + reg = < 0 >;
> > + clock-frequency = < 50000000 >;
> > + };
> > + };
> > +
> > + memory@10000000 {
> > + device_type = "memory";
> > + reg = < 0x10000000 0x4000000 >;
> > + };
> > +
> > + chosen {
> > + stdout-path = "/soc@abcd0000/serial@100";
> > + };
> > +
> > + soc@abcd0000 {
> > + compatible = "simple-bus";
> > + ranges = <0 0xabcd0000 0x100000>;
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + aic: interrupt-controller {
>
> aic: interrupt-controller@200 {
>
> > + compatible = "jcore,aic1";
> > + reg = < 0x200 0x10 >;
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + cache-controller {
>
> @c0
>
> > + compatible = "jcore,cache";
> > + reg = < 0xc0 4 >;
> > + };
> > +
> > + timer {
>
> @200
>
> > + compatible = "jcore,pit";
> > + reg = < 0x200 0x30 >;
> > + interrupts = < 0x48 >;
> > + };
> > +
> > + spi {
>
> @40
>
> > + compatible = "jcore,spi2";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + spi-max-frequency = <12500000>;
> > +
> > + reg = < 0x40 0x8 >;
> > +
> > + sdcard@1 {
>
> @0, to match reg below?
Yes; thanks for catching that. The chipselect logic was wrong a long
time ago and the wrong setting to compensate for that was fixed in the
actual reg cell but not in the name when the driver was fixed. I'm
applying all these changes.
Rich
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