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| Started by | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| First post | 2016-05-13 04:20 +0200 |
| Last post | 2016-05-18 08:00 +0200 |
| Articles | 4 — 2 participants |
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Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-13 04:20 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-16 04:10 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Florian Fainelli <f.fainelli@gmail.com> - 2016-05-17 22:00 +0200
Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs Kefeng Wang <wangkefeng.wang@huawei.com> - 2016-05-18 08:00 +0200
| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-13 04:20 +0200 |
| Subject | Re: [PATCH 1/2] arm64: dts: NS2: Add all of the UARTs |
| Message-ID | <ryaRQ-22W-7@gated-at.bofh.it> |
On 2016/5/12 22:46, Jon Mason wrote:
>
>
> On Thu, May 12, 2016 at 2:16 AM, Kefeng Wang <wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com>> wrote:
>
>
>
> On 2016/5/12 6:56, Jon Mason wrote:
> > Add all of the UARTs present on NS2 and enable them in the SVK device
> > tree file. Also, do some magic to make sure that uart3 is discovered as
> > ttyS0 (as that is the console UART).
> >
> > Signed-off-by: Jon Mason <jonmason@broadcom.com <mailto:jonmason@broadcom.com>>
> > ---
> > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
> > arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
> > 2 files changed, 46 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > index 7cd3640..b062a44 100644
> > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > @@ -40,10 +40,14 @@
> >
> > aliases {
> > serial0 = &uart3;
> > + serial1 = &uart0;
> > + serial2 = &uart1;
> > + serial3 = &uart2;
> > };
> >
> > chosen {
> > stdout-path = "serial0:115200n8";
> > + bootargs = "earlycon=uart8250,mmio32,0x66130000";
>
> Hi Jon,
>
> I submit a patch[1], with it, we can use earlycon without option to enable early console
> for "snps,dw-apb-uart", could you help me to test it, thanks.
>
>
> Adding your change and removing the line above does not cause earlycon to work for me. Is there any additional changes necessary for this to work?
With my patch, the bootargs still need contain earlycon, but no need uart8250,mmio32,0x66130000;
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon";
}
Hope it would work.
BRs,
Kefeng
>
> Thanks,
> Jon
>
>
>
> BRs,
> Kefeng
>
>
> [1] https://lkml.org/lkml/2016/5/11/34
>
> > };
> >
> > memory {
> > @@ -68,6 +72,18 @@
> > status = "ok";
> > };
> >
> > +&uart0 {
> > + status = "ok";
> > +};
> > +
> > +&uart1 {
> > + status = "ok";
> > +};
> > +
> > +&uart2 {
> > + status = "ok";
> > +};
> > +
> > &uart3 {
> > status = "ok";
> > };
> > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > index 788ed8f..c77a9e8 100644
> > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > @@ -357,6 +357,36 @@
> > status = "disabled";
> > };
> >
> > + uart0: serial@66100000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x66100000 0x100>;
> > + interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&iprocslow>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > + uart1: serial@66110000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x66110000 0x100>;
> > + interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&iprocslow>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > + uart2: serial@66120000 {
> > + compatible = "snps,dw-apb-uart";
> > + reg = <0x66120000 0x100>;
> > + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&iprocslow>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > uart3: serial@66130000 {
> > compatible = "snps,dw-apb-uart";
> > reg = <0x66130000 0x100>;
> >
>
>
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-16 04:10 +0200 |
| Message-ID | <rzg8P-u7-29@gated-at.bofh.it> |
| In reply to | #1400450 |
On 2016/5/14 0:49, Jon Mason wrote:
>
>
> On Thu, May 12, 2016 at 10:09 PM, Kefeng Wang <wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com>> wrote:
>
>
>
> On 2016/5/12 22:46, Jon Mason wrote:
> >
> >
> > On Thu, May 12, 2016 at 2:16 AM, Kefeng Wang <wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com> <mailto:wangkefeng.wang@huawei.com <mailto:wangkefeng.wang@huawei.com>>> wrote:
> >
> >
> >
> > On 2016/5/12 6:56, Jon Mason wrote:
> > > Add all of the UARTs present on NS2 and enable them in the SVK device
> > > tree file. Also, do some magic to make sure that uart3 is discovered as
> > > ttyS0 (as that is the console UART).
> > >
> > > Signed-off-by: Jon Mason <jonmason@broadcom.com <mailto:jonmason@broadcom.com> <mailto:jonmason@broadcom.com <mailto:jonmason@broadcom.com>>>
> > > ---
> > > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 ++++++++++++++++
> > > arch/arm64/boot/dts/broadcom/ns2.dtsi | 30 ++++++++++++++++++++++++++++++
> > > 2 files changed, 46 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > > index 7cd3640..b062a44 100644
> > > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
> > > @@ -40,10 +40,14 @@
> > >
> > > aliases {
> > > serial0 = &uart3;
> > > + serial1 = &uart0;
> > > + serial2 = &uart1;
> > > + serial3 = &uart2;
> > > };
> > >
> > > chosen {
> > > stdout-path = "serial0:115200n8";
> > > + bootargs = "earlycon=uart8250,mmio32,0x66130000";
> >
> > Hi Jon,
> >
> > I submit a patch[1], with it, we can use earlycon without option to enable early console
> > for "snps,dw-apb-uart", could you help me to test it, thanks.
> >
> >
> > Adding your change and removing the line above does not cause earlycon to work for me. Is there any additional changes necessary for this to work?
> With my patch, the bootargs still need contain earlycon, but no need uart8250,mmio32,0x66130000;
>
> chosen {
> stdout-path = "serial0:115200n8";
> bootargs = "earlycon";
> }
>
> Hope it would work.
>
>
> I can confirm that with your change and the change to the bootargs you describe above, it works as desired. Was your change already accepted?
>
Great, thanks a lot. it is still being reviewing for now and waiting for response for now.
BRs,
Kefeng
> Thanks,
> Jon
>
>
>
> BRs,
> Kefeng
>
> >
> > Thanks,
> > Jon
> >
> >
> >
> > BRs,
> > Kefeng
> >
> >
> > [1] https://lkml.org/lkml/2016/5/11/34
> >
> > > };
> > >
> > > memory {
> > > @@ -68,6 +72,18 @@
> > > status = "ok";
> > > };
> > >
> > > +&uart0 {
> > > + status = "ok";
> > > +};
> > > +
> > > +&uart1 {
> > > + status = "ok";
> > > +};
> > > +
> > > +&uart2 {
> > > + status = "ok";
> > > +};
> > > +
> > > &uart3 {
> > > status = "ok";
> > > };
> > > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > > index 788ed8f..c77a9e8 100644
> > > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
> > > @@ -357,6 +357,36 @@
> > > status = "disabled";
> > > };
> > >
> > > + uart0: serial@66100000 {
> > > + compatible = "snps,dw-apb-uart";
> > > + reg = <0x66100000 0x100>;
> > > + interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&iprocslow>;
> > > + reg-shift = <2>;
> > > + reg-io-width = <4>;
> > > + status = "disabled";
> > > + };
> > > +
> > > + uart1: serial@66110000 {
> > > + compatible = "snps,dw-apb-uart";
> > > + reg = <0x66110000 0x100>;
> > > + interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&iprocslow>;
> > > + reg-shift = <2>;
> > > + reg-io-width = <4>;
> > > + status = "disabled";
> > > + };
> > > +
> > > + uart2: serial@66120000 {
> > > + compatible = "snps,dw-apb-uart";
> > > + reg = <0x66120000 0x100>;
> > > + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
> > > + clocks = <&iprocslow>;
> > > + reg-shift = <2>;
> > > + reg-io-width = <4>;
> > > + status = "disabled";
> > > + };
> > > +
> > > uart3: serial@66130000 {
> > > compatible = "snps,dw-apb-uart";
> > > reg = <0x66130000 0x100>;
> > >
> >
> >
>
>
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2016-05-17 22:00 +0200 |
| Message-ID | <rzTjQ-pn-9@gated-at.bofh.it> |
| In reply to | #1401156 |
On 05/15/2016 06:11 PM, Kefeng Wang wrote: >> I can confirm that with your change and the change to the bootargs you describe above, it works as desired. Was your change already accepted? >> > > Great, thanks a lot. it is still being reviewing for now and waiting for response for now. Then I would be inclined to take Jon's patch as-is, and follow up with an additional patch to the NS2 DTS once yours lands in. -- Florian
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| From | Kefeng Wang <wangkefeng.wang@huawei.com> |
|---|---|
| Date | 2016-05-18 08:00 +0200 |
| Message-ID | <rA2Gu-6mH-5@gated-at.bofh.it> |
| In reply to | #1402563 |
On 2016/5/18 3:56, Florian Fainelli wrote: > On 05/15/2016 06:11 PM, Kefeng Wang wrote: >>> I can confirm that with your change and the change to the bootargs you describe above, it works as desired. Was your change already accepted? >>> >> >> Great, thanks a lot. it is still being reviewing for now and waiting for response for now. > > Then I would be inclined to take Jon's patch as-is, and follow up with > an additional patch to the NS2 DTS once yours lands in. > Sure, please. Kefeng
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