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Groups > linux.kernel > #1350795 > unrolled thread
| Started by | Rob Herring <robh@kernel.org> |
|---|---|
| First post | 2016-03-05 05:40 +0100 |
| Last post | 2016-03-07 16:00 +0100 |
| Articles | 2 — 2 participants |
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Re: [PATCH 2/4 v2] drm: Add DT bindings documentation for ARC PGU display controller Rob Herring <robh@kernel.org> - 2016-03-05 05:40 +0100
Re: [PATCH 2/4 v2] drm: Add DT bindings documentation for ARC PGU display controller Alexey Brodkin <Alexey.Brodkin@synopsys.com> - 2016-03-07 16:00 +0100
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-03-05 05:40 +0100 |
| Subject | Re: [PATCH 2/4 v2] drm: Add DT bindings documentation for ARC PGU display controller |
| Message-ID | <r9cau-Ll-19@gated-at.bofh.it> |
On Thu, Mar 03, 2016 at 05:39:14PM +0300, Alexey Brodkin wrote:
> This add DT bindings documentation for ARC PGU display controller.
>
> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-snps-arc@lists.infradead.org
> ---
>
> Changes v1 -> v2:
> * Clean-up
Not really useful. What we like to see is what changed. Maintainers have
short memories and don't remember what they said previously (unless
comments are ignored).
>
> .../devicetree/bindings/display/snps,arcpgu.txt | 33 ++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/snps,arcpgu.txt
>
> diff --git a/Documentation/devicetree/bindings/display/snps,arcpgu.txt b/Documentation/devicetree/bindings/display/snps,arcpgu.txt
> new file mode 100644
> index 0000000..57f3bc8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/snps,arcpgu.txt
> @@ -0,0 +1,33 @@
> +ARC PGU
> +
> +This is a display controller found on several development boards produced
> +by Synopsys. The ARC PGU is an RGB streamer that reads the data from a
> +framebuffer and sends it to a single digital encoder (usually HDMI).
> +
> +Required properties:
> + - compatible: "snps,arcpgu"
> + - reg: Physical base address and length of the controller's registers.
> + - clocks: A list of phandle + clock-specifier pairs, one for each
> + entry in 'clock-names'.
> + - clock-names: A list of clock names. For ARC PGU it should contain:
> + - "pxlclk" for the clock feeding the output PLL of the controller.
> +
> +Required sub-nodes:
> + - port: The PGU connection to an encoder chip. The connection is modelled
> + using the OF graph bindings specified in
> + Documentation/devicetree/bindings/graph.txt.
> +
> +Example:
> +
> +/ {
> + ...
> +
> + pgu@XXXXXXXX {
> + compatible = "snps,arcpgu";
> + reg = <0xXXXXXXXX 0x400>;
> + clocks = <&clock_node>;
> + clock-names = "pxlclk";
Where's the port? Didn't you previously say it was optional?
> + };
> +
> + ...
> +};
> --
> 2.5.0
>
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| From | Alexey Brodkin <Alexey.Brodkin@synopsys.com> |
|---|---|
| Date | 2016-03-07 16:00 +0100 |
| Message-ID | <ra4NA-49R-25@gated-at.bofh.it> |
| In reply to | #1350795 |
Hi Rob, On Fri, 2016-03-04 at 22:30 -0600, Rob Herring wrote: +AD4- On Thu, Mar 03, 2016 at 05:39:14PM +-0300, Alexey Brodkin wrote: +AD4- +AD4- +AD4- +AD4- This add DT bindings documentation for ARC PGU display controller. +AD4- +AD4- +AD4- +AD4- Signed-off-by: Alexey Brodkin +ADw-abrodkin+AEA-synopsys.com+AD4- +AD4- +AD4- Cc: Rob Herring +ADw-robh+-dt+AEA-kernel.org+AD4- +AD4- +AD4- Cc: Pawel Moll +ADw-pawel.moll+AEA-arm.com+AD4- +AD4- +AD4- Cc: Mark Rutland +ADw-mark.rutland+AEA-arm.com+AD4- +AD4- +AD4- Cc: Ian Campbell +ADw-ijc+-devicetree+AEA-hellion.org.uk+AD4- +AD4- +AD4- Cc: Kumar Gala +ADw-galak+AEA-codeaurora.org+AD4- +AD4- +AD4- Cc: devicetree+AEA-vger.kernel.org +AD4- +AD4- Cc: linux-snps-arc+AEA-lists.infradead.org +AD4- +AD4- --- +AD4- +AD4- +AD4- +AD4- Changes v1 -+AD4- v2: +AD4- +AD4- +AKAAKg- Clean-up +AD4- Not really useful. What we like to see is what changed. Maintainers have+AKA- +AD4- short memories and don't remember what they said previously (unless+AKA- +AD4- comments are ignored). That's understood :) +AD4- +AD4- +AD4- +AD4- +AD4- +AD4- +AKA-.../devicetree/bindings/display/snps,arcpgu.txt+AKAAoACgAKAAfA- 33 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+- +AD4- +AD4- +AKA-1 file changed, 33 insertions(+-) +AD4- +AD4- +AKA-create mode 100644 Documentation/devicetree/bindings/display/snps,arcpgu.txt +AD4- +AD4- +AD4- +AD4- diff --git a/Documentation/devicetree/bindings/display/snps,arcpgu.txt +AD4- +AD4- b/Documentation/devicetree/bindings/display/snps,arcpgu.txt +AD4- +AD4- new file mode 100644 +AD4- +AD4- index 0000000..57f3bc8 +AD4- +AD4- --- /dev/null +AD4- +AD4- +-+-+- b/Documentation/devicetree/bindings/display/snps,arcpgu.txt +AD4- +AD4- +AEAAQA- -0,0 +-1,33 +AEAAQA- +AD4- +AD4- +-ARC PGU +AD4- +AD4- +- +AD4- +AD4- +-This is a display controller found on several development boards produced +AD4- +AD4- +-by Synopsys. The ARC PGU is an RGB streamer that reads the data from a +AD4- +AD4- +-framebuffer and sends it to a single digital encoder (usually HDMI). +AD4- +AD4- +- +AD4- +AD4- +-Required properties: +AD4- +AD4- +-+AKAAoA-- compatible: +ACI-snps,arcpgu+ACI- +AD4- +AD4- +-+AKAAoA-- reg: Physical base address and length of the controller's registers. +AD4- +AD4- +-+AKAAoA-- clocks: A list of phandle +- clock-specifier pairs, one for each +AD4- +AD4- +-+AKAAoACgAKA-entry in 'clock-names'. +AD4- +AD4- +-+AKAAoA-- clock-names: A list of clock names. For ARC PGU it should contain: +AD4- +AD4- +-+AKAAoACgAKAAoACg-- +ACI-pxlclk+ACI- for the clock feeding the output PLL of the controller. +AD4- +AD4- +- +AD4- +AD4- +-Required sub-nodes: +AD4- +AD4- +-+AKAAoA-- port: The PGU connection to an encoder chip. The connection is modelled +AD4- +AD4- +-+AKAAoACgAKA-using the OF graph bindings specified in +AD4- +AD4- +-+AKAAoACgAKA-Documentation/devicetree/bindings/graph.txt. +AD4- +AD4- +- +AD4- +AD4- +-Example: +AD4- +AD4- +- +AD4- +AD4- +-/ +AHs- +AD4- +AD4- +- ... +AD4- +AD4- +- +AD4- +AD4- +- pgu+AEA-XXXXXXXX +AHs- +AD4- +AD4- +- compatible +AD0- +ACI-snps,arcpgu+ACIAOw- +AD4- +AD4- +- reg +AD0- +ADw-0xXXXXXXXX 0x400+AD4AOw- +AD4- +AD4- +- clocks +AD0- +ADwAJg-clock+AF8-node+AD4AOw- +AD4- +AD4- +- clock-names +AD0- +ACI-pxlclk+ACIAOw- +AD4- Where's the port? Didn't you previously say it was optional? Well I wanted to get rid of anything except bare minimal that is required for that driver. What I did miss in that clean-up is description above. In particular +ACI-Required subnodes+ACI- section that still lists +ACI-port+ACI-. And frankly now I'm a bit lost with what should I put in that binding description and what should not. Any comments here are much appreciated. -Alexey
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