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Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation

Started byBrian Norris <computersforpeace@gmail.com>
First post2016-03-05 03:10 +0100
Last post2016-03-07 20:00 +0100
Articles 3 — 2 participants

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  Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation Brian Norris <computersforpeace@gmail.com> - 2016-03-05 03:10 +0100
    Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation Roger Quadros <rogerq@ti.com> - 2016-03-07 10:50 +0100
      Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation Brian Norris <computersforpeace@gmail.com> - 2016-03-07 20:00 +0100

#1350733 — Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation

FromBrian Norris <computersforpeace@gmail.com>
Date2016-03-05 03:10 +0100
SubjectRe: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation
Message-ID<r99Pj-7G4-1@gated-at.bofh.it>
On Fri, Feb 19, 2016 at 11:15:32PM +0200, Roger Quadros wrote:
> Add compatible id and interrupts. The NAND interrupts are
> provided by the GPMC controller node.
> 
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
>  Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> index fb733c4..810b87b 100644
> --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> @@ -13,7 +13,11 @@ Documentation/devicetree/bindings/mtd/nand.txt
>  
>  Required properties:
>  
> - - reg:		The CS line the peripheral is connected to
> + - compatible:	"ti,omap2-nand"
> + - reg:		range id (CS number), base offset and length of the
> +		NAND I/O space

Is it normal to mix types of addressing in a single 'reg' property? Is
your code working for anything besides CS==0?

Brian

> + - interrupt-parent: must point to gpmc node
> + - interrupts:	Two interrupt specifiers, one for fifoevent, one for termcount.
>  
>  Optional properties:
>  
> @@ -55,20 +59,25 @@ Example for an AM33xx board:
>  	gpmc: gpmc@50000000 {
>  		compatible = "ti,am3352-gpmc";
>  		ti,hwmods = "gpmc";
> -		reg = <0x50000000 0x1000000>;
> +		reg = <0x50000000 0x36c>;
>  		interrupts = <100>;
>  		gpmc,num-cs = <8>;
>  		gpmc,num-waitpins = <2>;
>  		#address-cells = <2>;
>  		#size-cells = <1>;
> -		ranges = <0 0 0x08000000 0x2000>;	/* CS0: NAND */
> +		ranges = <0 0 0x08000000 0x1000000>;	/* CS0 space, 16MB */
>  		elm_id = <&elm>;
>  
>  		nand@0,0 {
> -			reg = <0 0 0>; /* CS0, offset 0 */
> +			compatible = "ti,omap2-nand";
> +			reg = <0 0 4>;		/* CS0, offset 0, NAND I/O window 4 */
> +			interrupt-parent = <&gpmc>;
> +			interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE NONE>;
>  			nand-bus-width = <16>;
>  			ti,nand-ecc-opt = "bch8";
>  			ti,nand-xfer-type = "polled";
> +			interrupt-parent = <&gpmc>;
> +			interrupts = <0>, <1>;
>  
>  			gpmc,sync-clk-ps = <0>;
>  			gpmc,cs-on-ns = <0>;
> -- 
> 2.1.4
> 

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#1351444

FromRoger Quadros <rogerq@ti.com>
Date2016-03-07 10:50 +0100
Message-ID<r9ZXC-16Y-37@gated-at.bofh.it>
In reply to#1350733
On 05/03/16 04:04, Brian Norris wrote:
> On Fri, Feb 19, 2016 at 11:15:32PM +0200, Roger Quadros wrote:
>> Add compatible id and interrupts. The NAND interrupts are
>> provided by the GPMC controller node.
>>
>> Signed-off-by: Roger Quadros <rogerq@ti.com>
>> ---
>>  Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 17 +++++++++++++----
>>  1 file changed, 13 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
>> index fb733c4..810b87b 100644
>> --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
>> +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
>> @@ -13,7 +13,11 @@ Documentation/devicetree/bindings/mtd/nand.txt
>>  
>>  Required properties:
>>  
>> - - reg:		The CS line the peripheral is connected to
>> + - compatible:	"ti,omap2-nand"
>> + - reg:		range id (CS number), base offset and length of the
>> +		NAND I/O space
> 
> Is it normal to mix types of addressing in a single 'reg' property? Is
> your code working for anything besides CS==0?

Yes we're using non zero CS on different omap platforms.
I haven't changed the behaviour of the reg property in this series. Just updated the documentation.

I didn't understand what you meant by mixing type of addressing.

This usage is exactly as mentioned here
http://devicetree.org/Device_Tree_Usage#Ranges_.28Address_Translation.29

cheers,
-roger

> 
>> + - interrupt-parent: must point to gpmc node
>> + - interrupts:	Two interrupt specifiers, one for fifoevent, one for termcount.
>>  
>>  Optional properties:
>>  
>> @@ -55,20 +59,25 @@ Example for an AM33xx board:
>>  	gpmc: gpmc@50000000 {
>>  		compatible = "ti,am3352-gpmc";
>>  		ti,hwmods = "gpmc";
>> -		reg = <0x50000000 0x1000000>;
>> +		reg = <0x50000000 0x36c>;
>>  		interrupts = <100>;
>>  		gpmc,num-cs = <8>;
>>  		gpmc,num-waitpins = <2>;
>>  		#address-cells = <2>;
>>  		#size-cells = <1>;
>> -		ranges = <0 0 0x08000000 0x2000>;	/* CS0: NAND */
>> +		ranges = <0 0 0x08000000 0x1000000>;	/* CS0 space, 16MB */
>>  		elm_id = <&elm>;
>>  
>>  		nand@0,0 {
>> -			reg = <0 0 0>; /* CS0, offset 0 */
>> +			compatible = "ti,omap2-nand";
>> +			reg = <0 0 4>;		/* CS0, offset 0, NAND I/O window 4 */
>> +			interrupt-parent = <&gpmc>;
>> +			interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE NONE>;
>>  			nand-bus-width = <16>;
>>  			ti,nand-ecc-opt = "bch8";
>>  			ti,nand-xfer-type = "polled";
>> +			interrupt-parent = <&gpmc>;
>> +			interrupts = <0>, <1>;
>>  
>>  			gpmc,sync-clk-ps = <0>;
>>  			gpmc,cs-on-ns = <0>;
>> -- 
>> 2.1.4
>>

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#1351885

FromBrian Norris <computersforpeace@gmail.com>
Date2016-03-07 20:00 +0100
Message-ID<ra8xQ-6CZ-11@gated-at.bofh.it>
In reply to#1351444
On Mon, Mar 07, 2016 at 11:46:24AM +0200, Roger Quadros wrote:
> On 05/03/16 04:04, Brian Norris wrote:
> > Is it normal to mix types of addressing in a single 'reg' property? Is
> > your code working for anything besides CS==0?
> 
> Yes we're using non zero CS on different omap platforms.
> I haven't changed the behaviour of the reg property in this series. Just updated the documentation.
> 
> I didn't understand what you meant by mixing type of addressing.
> 
> This usage is exactly as mentioned here
> http://devicetree.org/Device_Tree_Usage#Ranges_.28Address_Translation.29

I think I was just misunderstanding the use of the reg, *-cells, and
ranges properties here. Thanks for the pointer.

Brian

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