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[PART1 RFC v2 09/10] svm: Do not intercept CR8 when enable AVIC

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  [PART1 RFC v2 09/10] svm: Do not intercept CR8 when enable AVIC Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-04 21:50 +0100
    Re: [PART1 RFC v2 09/10] svm: Do not intercept CR8 when enable AVIC Paolo Bonzini <pbonzini@redhat.com> - 2016-03-07 16:40 +0100
      Re: [PART1 RFC v2 09/10] svm: Do not intercept CR8 when enable AVIC Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2016-03-14 07:10 +0100
        Re: [PART1 RFC v2 09/10] svm: Do not intercept CR8 when enable AVIC Paolo Bonzini <pbonzini@redhat.com> - 2016-03-14 13:30 +0100

#1350573 — [PART1 RFC v2 09/10] svm: Do not intercept CR8 when enable AVIC

When enable AVIC:
    * Do not intercept CR8 since this should be handled by AVIC HW.
    * Also update TPR in APIC backing page when syncing CR8 before VMRUN

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 arch/x86/kvm/svm.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 02cd8d0..5142861 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -986,6 +986,9 @@ static __init int svm_hardware_setup(void)
 
 	if (avic) {
 		printk(KERN_INFO "kvm: AVIC enabled\n");
+
+		/* Do not do cr8 intercept if AVIC is enabled. */
+		svm_x86_ops.update_cr8_intercept = NULL;
 	} else {
 		svm_x86_ops.deliver_posted_interrupt = NULL;
 	}
@@ -1116,7 +1119,8 @@ static void init_vmcb(struct vcpu_svm *svm)
 	set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
 	set_cr_intercept(svm, INTERCEPT_CR3_WRITE);
 	set_cr_intercept(svm, INTERCEPT_CR4_WRITE);
-	set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
+	if (!avic)
+		set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
 
 	set_dr_intercepts(svm);
 
@@ -4277,7 +4281,8 @@ static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
 {
 	struct vcpu_svm *svm = to_svm(vcpu);
 
-	if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
+	if ((is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK)) ||
+	     avic)
 		return;
 
 	clr_cr_intercept(svm, INTERCEPT_CR8_WRITE);
@@ -4472,8 +4477,10 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)
 	if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
 		return;
 
-	cr8 = kvm_get_cr8(vcpu);
-	svm->vmcb->control.v_tpr = cr8 & V_TPR_MASK;
+	svm->vmcb->control.v_tpr = cr8 = kvm_get_cr8(vcpu) & V_TPR_MASK;
+
+	if (avic)
+		*(avic_get_bk_page_entry(svm, APIC_TASKPRI)) = (u32)cr8 << 4;
 }
 
 static void svm_complete_interrupts(struct vcpu_svm *svm)
-- 
1.9.1

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#1351723

On 04/03/2016 21:46, Suravee Suthikulpanit wrote:
> +
> +		/* Do not do cr8 intercept if AVIC is enabled. */

No need for this comment.

> +		svm_x86_ops.update_cr8_intercept = NULL;
>  	} else {
>  		svm_x86_ops.deliver_posted_interrupt = NULL;
>  	}
> @@ -1116,7 +1119,8 @@ static void init_vmcb(struct vcpu_svm *svm)
>  	set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
>  	set_cr_intercept(svm, INTERCEPT_CR3_WRITE);
>  	set_cr_intercept(svm, INTERCEPT_CR4_WRITE);
> -	set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
> +	if (!avic)

Remember that AVIC enabled/disabled must be refreshed when the
.refresh_apicv_exec_ctrl callback is invoked, so it is not enough to use
the global variable.

Paolo

> +		set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
>  
>  	set_dr_intercepts(svm);
>  
> @@ -4277,7 +4281,8 @@ static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
>  {
>  	struct vcpu_svm *svm = to_svm(vcpu);
>  
> -	if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
> +	if ((is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK)) ||
> +	     avic)
>  		return;
>  
>  	clr_cr_intercept(svm, INTERCEPT_CR8_WRITE);
> @@ -4472,8 +4477,10 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)
>  	if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
>  		return;
>  
> -	cr8 = kvm_get_cr8(vcpu);
> -	svm->vmcb->control.v_tpr = cr8 & V_TPR_MASK;
> +	svm->vmcb->control.v_tpr = cr8 = kvm_get_cr8(vcpu) & V_TPR_MASK;
> +
> +	if (avic)
> +		*(avic_get_bk_page_entry(svm, APIC_TASKPRI)) = (u32)cr8 << 4;

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#1356956

Hi

On 03/07/2016 10:39 PM, Paolo Bonzini wrote:
>> +		svm_x86_ops.update_cr8_intercept = NULL;
>> >  	} else {
>> >  		svm_x86_ops.deliver_posted_interrupt = NULL;
>> >  	}
>> >@@ -1116,7 +1119,8 @@ static void init_vmcb(struct vcpu_svm *svm)
>> >  	set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
>> >  	set_cr_intercept(svm, INTERCEPT_CR3_WRITE);
>> >  	set_cr_intercept(svm, INTERCEPT_CR4_WRITE);
>> >-	set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
>> >+	if (!avic)
> Remember that AVIC enabled/disabled must be refreshed when the
> .refresh_apicv_exec_ctrl callback is invoked, so it is not enough to use
> the global variable.
>
> Paolo
>

Good point. I'll fix this.  By the way, how can we enable APICv only in 
certain VM? Does Qemu/KVM have any specific flags that we can pass to 
enable/disable this?

Thanks,
Suravee

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#1357208

On 14/03/2016 07:09, Suravee Suthikulpanit wrote:
> By the way, how can we enable APICv only in certain VM? Does Qemu/KVM
> have any specific flags that we can pass to enable/disable this?

You can use "-cpu kvm64,+hv-synic".

Paolo

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