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| Started by | Dan Williams <dan.j.williams@intel.com> |
|---|---|
| First post | 2016-03-03 23:00 +0100 |
| Last post | 2016-03-03 23:00 +0100 |
| Articles | 3 — 1 participant |
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[PATCH v2 0/3] libnvdimm, pfn: support section misaligned pmem Dan Williams <dan.j.williams@intel.com> - 2016-03-03 23:00 +0100
[PATCH v2 1/3] libnvdimm, pmem: fix 'pfn' support for section-misaligned namespaces Dan Williams <dan.j.williams@intel.com> - 2016-03-03 23:00 +0100
[PATCH v2 3/3] libnvdimm, pfn: 'resource'-address and 'size' attributes for pfn devices Dan Williams <dan.j.williams@intel.com> - 2016-03-03 23:00 +0100
| From | Dan Williams <dan.j.williams@intel.com> |
|---|---|
| Date | 2016-03-03 23:00 +0100 |
| Subject | [PATCH v2 0/3] libnvdimm, pfn: support section misaligned pmem |
| Message-ID | <r8JrQ-4UP-9@gated-at.bofh.it> |
Permit platforms with section-misaligned persistent memory to establish
memory-mode (pfn) namespaces. This sacrifices 64-128MB of pmem to gain
third-party DMA/RDMA support.
Changes since v1 [1]:
1/ Dropped "mm: fix mixed zone detection in devm_memremap_pages" since
it was pulled into Andrew's tree.
2/ Moved CONFIG_SPARSEMEM #ifdef guards into drivers/nvdimm/pfn.h
3/ Added "libnvdimm, pmem: adjust for section collisions with 'System
RAM'", i.e. support for reserving head and tail capacity out of a
namespace to permit a section aligned range to be used for a
'pfn'-device instance.
4/ Added 'resource' and 'size' attributes to an active pfn instance.
[1]: https://lists.01.org/pipermail/linux-nvdimm/2016-February/004727.html
This series is built on top of tip.git/core/resources.
---
Dan Williams (3):
libnvdimm, pmem: fix 'pfn' support for section-misaligned namespaces
libnvdimm, pmem: adjust for section collisions with 'System RAM'
libnvdimm, pfn: 'resource'-address and 'size' attributes for pfn devices
drivers/nvdimm/namespace_devs.c | 7 ++
drivers/nvdimm/pfn.h | 23 ++++++
drivers/nvdimm/pfn_devs.c | 61 ++++++++++++++++
drivers/nvdimm/pmem.c | 145 ++++++++++++++++++++++++++++++---------
4 files changed, 200 insertions(+), 36 deletions(-)
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| From | Dan Williams <dan.j.williams@intel.com> |
|---|---|
| Date | 2016-03-03 23:00 +0100 |
| Subject | [PATCH v2 1/3] libnvdimm, pmem: fix 'pfn' support for section-misaligned namespaces |
| Message-ID | <r8JrQ-4UP-13@gated-at.bofh.it> |
| In reply to | #1349613 |
The altmap for a section-misaligned namespace needs to arrange for the
base_pfn to be section-aligned. As a result the 'reserve' region (pfns
from base that do not have a struct page) must be increased. Otherwise
we trip the altmap validation check in __add_pages:
if (altmap->base_pfn != phys_start_pfn
|| vmem_altmap_offset(altmap) > nr_pages) {
pr_warn_once("memory add fail, invalid altmap\n");
return -EINVAL;
}
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
drivers/nvdimm/pfn.h | 13 +++++++++++++
drivers/nvdimm/pmem.c | 24 ++++++++++++++++++++++--
2 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/nvdimm/pfn.h b/drivers/nvdimm/pfn.h
index cc243754acef..6ee707e5b279 100644
--- a/drivers/nvdimm/pfn.h
+++ b/drivers/nvdimm/pfn.h
@@ -15,6 +15,7 @@
#define __NVDIMM_PFN_H
#include <linux/types.h>
+#include <linux/mmzone.h>
#define PFN_SIG_LEN 16
#define PFN_SIG "NVDIMM_PFN_INFO\0"
@@ -32,4 +33,16 @@ struct nd_pfn_sb {
u8 padding[4012];
__le64 checksum;
};
+
+#ifdef CONFIG_SPARSEMEM
+#define PFN_SECTION_ALIGN_DOWN(x) SECTION_ALIGN_DOWN(x)
+#define PFN_SECTION_ALIGN_UP(x) SECTION_ALIGN_UP(x)
+#else
+/*
+ * In this case ZONE_DEVICE=n and we will disable 'pfn' device support,
+ * but we still want pmem to compile.
+ */
+#define PFN_SECTION_ALIGN_DOWN(x) (x)
+#define PFN_SECTION_ALIGN_UP(x) (x)
+#endif
#endif /* __NVDIMM_PFN_H */
diff --git a/drivers/nvdimm/pmem.c b/drivers/nvdimm/pmem.c
index 7edf31671dab..68a20b2e3d03 100644
--- a/drivers/nvdimm/pmem.c
+++ b/drivers/nvdimm/pmem.c
@@ -356,6 +356,26 @@ static int nvdimm_namespace_detach_pfn(struct nd_namespace_common *ndns)
return 0;
}
+/*
+ * We hotplug memory at section granularity, pad the reserved area from
+ * the previous section base to the namespace base address.
+ */
+static unsigned long init_altmap_base(resource_size_t base)
+{
+ unsigned long base_pfn = __phys_to_pfn(base);
+
+ return PFN_SECTION_ALIGN_DOWN(base_pfn);
+}
+
+static unsigned long init_altmap_reserve(resource_size_t base)
+{
+ unsigned long reserve = __phys_to_pfn(SZ_8K);
+ unsigned long base_pfn = __phys_to_pfn(base);
+
+ reserve += base_pfn - PFN_SECTION_ALIGN_DOWN(base_pfn);
+ return reserve;
+}
+
static int nvdimm_namespace_attach_pfn(struct nd_namespace_common *ndns)
{
struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev);
@@ -369,8 +389,8 @@ static int nvdimm_namespace_attach_pfn(struct nd_namespace_common *ndns)
phys_addr_t offset;
int rc;
struct vmem_altmap __altmap = {
- .base_pfn = __phys_to_pfn(nsio->res.start),
- .reserve = __phys_to_pfn(SZ_8K),
+ .base_pfn = init_altmap_base(nsio->res.start),
+ .reserve = init_altmap_reserve(nsio->res.start),
};
if (!nd_pfn->uuid || !nd_pfn->ndns)
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| From | Dan Williams <dan.j.williams@intel.com> |
|---|---|
| Date | 2016-03-03 23:00 +0100 |
| Subject | [PATCH v2 3/3] libnvdimm, pfn: 'resource'-address and 'size' attributes for pfn devices |
| Message-ID | <r8JrQ-4UP-15@gated-at.bofh.it> |
| In reply to | #1349613 |
Currenty with a raw mode pmem namespace the physical memory address range for
the device can be obtained via /sys/block/pmemX/device/{resource|size}. Add
similar attributes for pfn instances that takes the struct page memmap and
section padding into account.
Reported-by: Haozhong Zhang <haozhong.zhang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
drivers/nvdimm/pfn_devs.c | 56 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/drivers/nvdimm/pfn_devs.c b/drivers/nvdimm/pfn_devs.c
index 14642617a153..a43942ffc173 100644
--- a/drivers/nvdimm/pfn_devs.c
+++ b/drivers/nvdimm/pfn_devs.c
@@ -205,11 +205,67 @@ static ssize_t namespace_store(struct device *dev,
}
static DEVICE_ATTR_RW(namespace);
+static ssize_t resource_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct nd_pfn *nd_pfn = to_nd_pfn(dev);
+ ssize_t rc;
+
+ device_lock(dev);
+ if (dev->driver) {
+ struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb;
+ u64 offset = __le64_to_cpu(pfn_sb->dataoff);
+ struct nd_namespace_common *ndns = nd_pfn->ndns;
+ u32 start_pad = __le32_to_cpu(pfn_sb->start_pad);
+ struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev);
+
+ rc = sprintf(buf, "%#llx\n", (unsigned long long) nsio->res.start
+ + start_pad + offset);
+ } else {
+ /* no address to convey if the pfn instance is disabled */
+ rc = -ENXIO;
+ }
+ device_unlock(dev);
+
+ return rc;
+}
+static DEVICE_ATTR_RO(resource);
+
+static ssize_t size_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct nd_pfn *nd_pfn = to_nd_pfn(dev);
+ ssize_t rc;
+
+ device_lock(dev);
+ if (dev->driver) {
+ struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb;
+ u64 offset = __le64_to_cpu(pfn_sb->dataoff);
+ struct nd_namespace_common *ndns = nd_pfn->ndns;
+ u32 start_pad = __le32_to_cpu(pfn_sb->start_pad);
+ u32 end_trunc = __le32_to_cpu(pfn_sb->end_trunc);
+ struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev);
+
+ rc = sprintf(buf, "%llu\n", (unsigned long long)
+ resource_size(&nsio->res) - start_pad
+ - end_trunc - offset);
+ } else {
+ /* no size to convey if the pfn instance is disabled */
+ rc = -ENXIO;
+ }
+ device_unlock(dev);
+
+ return rc;
+}
+static DEVICE_ATTR_RO(size);
+
static struct attribute *nd_pfn_attributes[] = {
&dev_attr_mode.attr,
&dev_attr_namespace.attr,
&dev_attr_uuid.attr,
&dev_attr_align.attr,
+ &dev_attr_resource.attr,
+ &dev_attr_size.attr,
NULL,
};
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