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[PATCH V2 4/5] x86/mce: Clarify comments regarding deferred error

Started byAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
First post2016-02-29 23:20 +0100
Last post2016-02-29 23:20 +0100
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  [PATCH V2 4/5] x86/mce: Clarify comments regarding deferred error Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> - 2016-02-29 23:20 +0100

#1346201 — [PATCH V2 4/5] x86/mce: Clarify comments regarding deferred error

FromAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Date2016-02-29 23:20 +0100
Subject[PATCH V2 4/5] x86/mce: Clarify comments regarding deferred error
Message-ID<r7Ekx-tv-5@gated-at.bofh.it>
The Deferred field indicates if we have a Deferred error.
Deferred errors indicate errors that hardware could not
fix. But it still does not cause any interruption to program
flow. So it does not generate any #MC and UC bit in MCx_STATUS
is not set.

Fixing comment here. No functional change

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
---
 arch/x86/include/asm/mce.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 69f8bda..3b45e36 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -40,7 +40,7 @@
 #define MCI_STATUS_AR	 (1ULL<<55)  /* Action required */
 
 /* AMD-specific bits */
-#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare an uncorrected error */
+#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* uncorrected error, deferred exception */
 #define MCI_STATUS_POISON	(1ULL<<43)  /* access poisonous data */
 #define MCI_STATUS_TCC		(1ULL<<55)  /* Task context corrupt */
 
-- 
2.7.0

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