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Groups > linux.kernel > #1343319 > unrolled thread
| Started by | Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> |
|---|---|
| First post | 2016-02-25 18:00 +0100 |
| Last post | 2016-02-26 10:10 +0100 |
| Articles | 4 — 2 participants |
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[PATCH 0/2] CAN & CAN FD pinctrl support for r8a7795 SoC Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> - 2016-02-25 18:00 +0100
[PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> - 2016-02-25 18:10 +0100
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support Geert Uytterhoeven <geert@linux-m68k.org> - 2016-02-26 10:10 +0100
Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support Geert Uytterhoeven <geert@linux-m68k.org> - 2016-02-26 10:10 +0100
| From | Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> |
|---|---|
| Date | 2016-02-25 18:00 +0100 |
| Subject | [PATCH 0/2] CAN & CAN FD pinctrl support for r8a7795 SoC |
| Message-ID | <r67qG-6DX-7@gated-at.bofh.it> |
This patch set adds CAN & CAN FD pinctrl support for r8a7795 SoC. This set is based on linux-next repo(tag: next-20160225). Ramesh Shanmugasundaram (2): pinctrl: sh-pfc: r8a7795: Add CAN support pinctrl: sh-pfc: r8a7795: Add CAN FD support drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 102 +++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) -- 1.9.1
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| From | Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> |
|---|---|
| Date | 2016-02-25 18:10 +0100 |
| Subject | [PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support |
| Message-ID | <r67Am-6XN-3@gated-at.bofh.it> |
| In reply to | #1343319 |
This patch adds CAN[0-1] pinmux support to r8a7795 SoC.
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
---
drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 58 ++++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index ce4f5cd..fbe8e95 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -2913,6 +2913,43 @@ static const unsigned int scif_clk_b_mux[] = {
SCIF_CLK_B_MARK,
};
+/* - RCAN ------------------------------------------------------------------ */
+static const unsigned int can0_data_a_pins[] = {
+ /* TX, RX */
+ RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
+};
+
+static const unsigned int can0_data_a_mux[] = {
+ CAN0_TX_A_MARK, CAN0_RX_A_MARK,
+};
+
+static const unsigned int can0_data_b_pins[] = {
+ /* TX, RX */
+ RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
+};
+
+static const unsigned int can0_data_b_mux[] = {
+ CAN0_TX_B_MARK, CAN0_RX_B_MARK,
+};
+
+static const unsigned int can1_data_pins[] = {
+ /* TX, RX */
+ RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26),
+};
+
+static const unsigned int can1_data_mux[] = {
+ CAN1_TX_MARK, CAN1_RX_MARK,
+};
+/* - RCAN-CLK --------------------------------------------------------------- */
+static const unsigned int can_clk_pins[] = {
+ /* CLK */
+ RCAR_GP_PIN(1, 25),
+};
+
+static const unsigned int can_clk_mux[] = {
+ CAN_CLK_MARK,
+};
+
/* - SSI -------------------------------------------------------------------- */
static const unsigned int ssi0_data_pins[] = {
/* SDATA */
@@ -3322,6 +3359,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(ssi9_data_b),
SH_PFC_PIN_GROUP(ssi9_ctrl_a),
SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+ SH_PFC_PIN_GROUP(can0_data_a),
+ SH_PFC_PIN_GROUP(can0_data_b),
+ SH_PFC_PIN_GROUP(can1_data),
+ SH_PFC_PIN_GROUP(can_clk),
};
static const char * const audio_clk_groups[] = {
@@ -3636,6 +3677,20 @@ static const char * const ssi_groups[] = {
"ssi9_ctrl_b",
};
+static const char * const can0_groups[] = {
+ "can0_data_a",
+ "can0_data_b",
+};
+
+static const char * const can1_groups[] = {
+ "can1_data",
+};
+
+static const char * const can_clk_groups[] = {
+ "can_clk",
+};
+
+
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk),
SH_PFC_FUNCTION(avb),
@@ -3664,6 +3719,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(sdhi2),
SH_PFC_FUNCTION(sdhi3),
SH_PFC_FUNCTION(ssi),
+ SH_PFC_FUNCTION(can0),
+ SH_PFC_FUNCTION(can1),
+ SH_PFC_FUNCTION(can_clk),
};
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
--
1.9.1
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| From | Geert Uytterhoeven <geert@linux-m68k.org> |
|---|---|
| Date | 2016-02-26 10:10 +0100 |
| Subject | Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support |
| Message-ID | <r6mzp-Sk-31@gated-at.bofh.it> |
| In reply to | #1343322 |
Hi Ramesh,
On Thu, Feb 25, 2016 at 5:48 PM, Ramesh Shanmugasundaram
<ramesh.shanmugasundaram@bp.renesas.com> wrote:
> This patch adds CAN[0-1] pinmux support to r8a7795 SoC.
>
> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Sorry, I spoke too soon. While the pin data is correct, I noticed the following
while applying:
> ---
> drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 58 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> index ce4f5cd..fbe8e95 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
> @@ -2913,6 +2913,43 @@ static const unsigned int scif_clk_b_mux[] = {
> SCIF_CLK_B_MARK,
> };
>
> +/* - RCAN ------------------------------------------------------------------ */
Please use "CAN" instead of "RCAN", and insert in alphabetical order.
> +static const unsigned int can0_data_a_pins[] = {
> + /* TX, RX */
> + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
> +};
> @@ -3322,6 +3359,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
> SH_PFC_PIN_GROUP(ssi9_data_b),
> SH_PFC_PIN_GROUP(ssi9_ctrl_a),
> SH_PFC_PIN_GROUP(ssi9_ctrl_b),
> + SH_PFC_PIN_GROUP(can0_data_a),
> + SH_PFC_PIN_GROUP(can0_data_b),
> + SH_PFC_PIN_GROUP(can1_data),
> + SH_PFC_PIN_GROUP(can_clk),
Please insert in alphabetical order.
> @@ -3636,6 +3677,20 @@ static const char * const ssi_groups[] = {
> "ssi9_ctrl_b",
> };
>
> +static const char * const can0_groups[] = {
Please insert in alphabetical order.
> @@ -3664,6 +3719,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
> SH_PFC_FUNCTION(sdhi2),
> SH_PFC_FUNCTION(sdhi3),
> SH_PFC_FUNCTION(ssi),
> + SH_PFC_FUNCTION(can0),
> + SH_PFC_FUNCTION(can1),
> + SH_PFC_FUNCTION(can_clk),
Please insert in alphabetical order.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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| From | Geert Uytterhoeven <geert@linux-m68k.org> |
|---|---|
| Date | 2016-02-26 10:10 +0100 |
| Subject | Re: [PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support |
| Message-ID | <r6mzp-Sk-37@gated-at.bofh.it> |
| In reply to | #1343322 |
On Thu, Feb 25, 2016 at 5:48 PM, Ramesh Shanmugasundaram
<ramesh.shanmugasundaram@bp.renesas.com> wrote:
> This patch adds CAN[0-1] pinmux support to r8a7795 SoC.
>
> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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