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| Started by | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| First post | 2016-02-25 10:40 +0100 |
| Last post | 2016-02-25 10:40 +0100 |
| Articles | 1 — 1 participant |
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Re: [PATCH v5] Fix sun7i pin assignment for IRQ's Linus Walleij <linus.walleij@linaro.org> - 2016-02-25 10:40 +0100
| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-02-25 10:40 +0100 |
| Subject | Re: [PATCH v5] Fix sun7i pin assignment for IRQ's |
| Message-ID | <r60yR-1KA-1@gated-at.bofh.it> |
On Mon, Feb 22, 2016 at 9:20 AM, Henry Paulissen <draakje197@gmail.com> wrote: > After testing IRQ pins we found some bugs in the pinctrl declaration. > Both PI* and PC* pins didn't work. PI* pins seemed to be connected > to the wrong mux and PC* pins waren't working at all. > > Please note that the A20 soc manual is contradicting between version > and even within the same document for both the PI and PC pins. > > Patch is based on testing with the hardware itself. > > Signed-off-by: Henry Paulissen <henry@nitronetworks.nl> (...) > Changes in v5: > Added a more detailed description. Aha there is a v5. I took out the v4 and applied this instead. Yours, Linus Walleij
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