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| Started by | "jianqun.xu" <jay.xu@rock-chips.com> |
|---|---|
| First post | 2016-02-23 08:10 +0100 |
| Last post | 2016-02-24 15:40 +0100 |
| Articles | 4 — 4 participants |
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[PATCH 1/4] soc: rockchip: add bindings for Rockchip grf "jianqun.xu" <jay.xu@rock-chips.com> - 2016-02-23 08:10 +0100
Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf Rob Herring <robh@kernel.org> - 2016-02-23 23:20 +0100
Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf Jianqun Xu <jay.xu@rock-chips.com> - 2016-02-24 01:20 +0100
Re: [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf Heiko Stuebner <heiko@sntech.de> - 2016-02-24 15:40 +0100
| From | "jianqun.xu" <jay.xu@rock-chips.com> |
|---|---|
| Date | 2016-02-23 08:10 +0100 |
| Subject | [PATCH 1/4] soc: rockchip: add bindings for Rockchip grf |
| Message-ID | <r5fgB-1QB-9@gated-at.bofh.it> |
From: Jianqun Xu <jay.xu@rock-chips.com>
Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
changes in v2:
- add grf.txt (Heiko)
.../devicetree/bindings/soc/rockchip/grf.txt | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 0000000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem
+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+ - "rockchip,rk3066-grf", "syscon": for rk3066
+ - "rockchip,rk3188-grf", "syscon": for rk3188
+ - "rockchip,rk3228-grf", "syscon": for rk3228
+ - "rockchip,rk3288-grf", "syscon": for rk3288
+ - "rockchip,rk3368-grf", "syscon": for rk3368
+ - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+ - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+ - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+ pmugrf: syscon@ff320000 {
+ compatible = "rockchip,rk3399-pmugrf", "syscon";
+ reg = <0x0 0xff320000 0x0 0x1000>;
+ };
+
+ grf: syscon@ff770000 {
+ compatible = "rockchip,rk3399-grf", "syscon";
+ reg = <0x0 0xff770000 0x0 0x10000>;
+ };
--
1.9.1
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-02-23 23:20 +0100 |
| Message-ID | <r5ttf-3q9-3@gated-at.bofh.it> |
| In reply to | #1340347 |
On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:
> From: Jianqun Xu <jay.xu@rock-chips.com>
>
> Add devicetree bindings for Rockchip grf which found on
> Rockchip SoCs.
>
> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
> ---
> changes in v2:
> - add grf.txt (Heiko)
>
> .../devicetree/bindings/soc/rockchip/grf.txt | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
>
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> new file mode 100644
> index 0000000..7fb0410
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
> @@ -0,0 +1,35 @@
> +* Rockchip General Register Files (GRF)
> +
> +The general register file will be used to do static set by software, which
> +is composed of many registers for system control.
> +
> +From RK3368 SoCs, the GRF is divided into two sections,
> +- GRF, used for general non-secure system,
> +- PMUGRF, used for always on sysyem
s/sysyem/system/
Otherwise:
Acked-by: Rob Herring <robh@kernel.org>
> +
> +Required Properties:
> +
> +- compatible: GRF should be one of the followings
> + - "rockchip,rk3066-grf", "syscon": for rk3066
> + - "rockchip,rk3188-grf", "syscon": for rk3188
> + - "rockchip,rk3228-grf", "syscon": for rk3228
> + - "rockchip,rk3288-grf", "syscon": for rk3288
> + - "rockchip,rk3368-grf", "syscon": for rk3368
> + - "rockchip,rk3399-grf", "syscon": for rk3399
> +- compatible: PMUGRF should be one of the followings
> + - "rockchip,rk3368-pmugrf", "syscon": for rk3368
> + - "rockchip,rk3399-pmugrf", "syscon": for rk3399
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +
> +Example: GRF and PMUGRF of RK3399 SoCs
> +
> + pmugrf: syscon@ff320000 {
> + compatible = "rockchip,rk3399-pmugrf", "syscon";
> + reg = <0x0 0xff320000 0x0 0x1000>;
> + };
> +
> + grf: syscon@ff770000 {
> + compatible = "rockchip,rk3399-grf", "syscon";
> + reg = <0x0 0xff770000 0x0 0x10000>;
> + };
> --
> 1.9.1
>
>
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| From | Jianqun Xu <jay.xu@rock-chips.com> |
|---|---|
| Date | 2016-02-24 01:20 +0100 |
| Message-ID | <r5vlo-4Oy-19@gated-at.bofh.it> |
| In reply to | #1341127 |
Hi Rob
在 24/02/2016 06:15, Rob Herring 写道:
> On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:
>> From: Jianqun Xu <jay.xu@rock-chips.com>
>>
>> Add devicetree bindings for Rockchip grf which found on
>> Rockchip SoCs.
>>
>> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
>> ---
>> changes in v2:
>> - add grf.txt (Heiko)
>>
>> .../devicetree/bindings/soc/rockchip/grf.txt | 35 ++++++++++++++++++++++
>> 1 file changed, 35 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
>>
>> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
>> new file mode 100644
>> index 0000000..7fb0410
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
>> @@ -0,0 +1,35 @@
>> +* Rockchip General Register Files (GRF)
>> +
>> +The general register file will be used to do static set by software, which
>> +is composed of many registers for system control.
>> +
>> +From RK3368 SoCs, the GRF is divided into two sections,
>> +- GRF, used for general non-secure system,
>> +- PMUGRF, used for always on sysyem
>
> s/sysyem/system/
>
> Otherwise:
>
> Acked-by: Rob Herring <robh@kernel.org>
>
ok, thanks
>> +
>> +Required Properties:
>> +
>> +- compatible: GRF should be one of the followings
>> + - "rockchip,rk3066-grf", "syscon": for rk3066
>> + - "rockchip,rk3188-grf", "syscon": for rk3188
>> + - "rockchip,rk3228-grf", "syscon": for rk3228
>> + - "rockchip,rk3288-grf", "syscon": for rk3288
>> + - "rockchip,rk3368-grf", "syscon": for rk3368
>> + - "rockchip,rk3399-grf", "syscon": for rk3399
>> +- compatible: PMUGRF should be one of the followings
>> + - "rockchip,rk3368-pmugrf", "syscon": for rk3368
>> + - "rockchip,rk3399-pmugrf", "syscon": for rk3399
>> +- reg: physical base address of the controller and length of memory mapped
>> + region.
>> +
>> +Example: GRF and PMUGRF of RK3399 SoCs
>> +
>> + pmugrf: syscon@ff320000 {
>> + compatible = "rockchip,rk3399-pmugrf", "syscon";
>> + reg = <0x0 0xff320000 0x0 0x1000>;
>> + };
>> +
>> + grf: syscon@ff770000 {
>> + compatible = "rockchip,rk3399-grf", "syscon";
>> + reg = <0x0 0xff770000 0x0 0x10000>;
>> + };
>> --
>> 1.9.1
>>
>>
>
>
>
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| From | Heiko Stuebner <heiko@sntech.de> |
|---|---|
| Date | 2016-02-24 15:40 +0100 |
| Message-ID | <r5ILD-5T6-5@gated-at.bofh.it> |
| In reply to | #1340347 |
Am Dienstag, 23. Februar 2016, 15:01:01 schrieb jianqun.xu: > From: Jianqun Xu <jay.xu@rock-chips.com> > > Add devicetree bindings for Rockchip grf which found on > Rockchip SoCs. > > Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> applied to my dts32 branch for 4.6 with Rob's Ack. Thanks Heiko
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