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[PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking

Started byKedareswara rao Appana <appana.durga.rao@xilinx.com>
First post2016-02-22 07:00 +0100
Last post2016-02-23 05:30 +0100
Articles 3 — 3 participants

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  [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-02-22 07:00 +0100
    Re: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle  checking Vinod Koul <vinod.koul@intel.com> - 2016-02-23 04:10 +0100
      RE: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle  checking Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> - 2016-02-23 05:30 +0100

#1339145 — [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking

FromKedareswara rao Appana <appana.durga.rao@xilinx.com>
Date2016-02-22 07:00 +0100
Subject[PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking
Message-ID<r4RHk-118-7@gated-at.bofh.it>
This patch improves the channel idle cheking by introduing
a new varibale in chan private structure.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
---
Changes for v2:
---> splitted the changes into multiple patches.

 drivers/dma/xilinx/xilinx_vdma.c | 41 ++++++++--------------------------------
 1 file changed, 8 insertions(+), 33 deletions(-)

diff --git a/drivers/dma/xilinx/xilinx_vdma.c b/drivers/dma/xilinx/xilinx_vdma.c
index 8db07f7..51686d1 100644
--- a/drivers/dma/xilinx/xilinx_vdma.c
+++ b/drivers/dma/xilinx/xilinx_vdma.c
@@ -202,6 +202,7 @@ struct xilinx_vdma_tx_descriptor {
  * @has_sg: Support scatter transfers
  * @genlock: Support genlock mode
  * @err: Channel has errors
+ * @idle: Check for channel idle
  * @tasklet: Cleanup work after irq
  * @config: Device configuration info
  * @flush_on_fsync: Flush on Frame sync
@@ -225,6 +226,7 @@ struct xilinx_vdma_chan {
 	bool has_sg;
 	bool genlock;
 	bool err;
+	bool idle;
 	struct tasklet_struct tasklet;
 	struct xilinx_vdma_config config;
 	bool flush_on_fsync;
@@ -519,32 +521,6 @@ static enum dma_status xilinx_vdma_tx_status(struct dma_chan *dchan,
 }
 
 /**
- * xilinx_vdma_is_running - Check if VDMA channel is running
- * @chan: Driver specific VDMA channel
- *
- * Return: '1' if running, '0' if not.
- */
-static bool xilinx_vdma_is_running(struct xilinx_vdma_chan *chan)
-{
-	return !(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
-		 XILINX_VDMA_DMASR_HALTED) &&
-		(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
-		 XILINX_VDMA_DMACR_RUNSTOP);
-}
-
-/**
- * xilinx_vdma_is_idle - Check if VDMA channel is idle
- * @chan: Driver specific VDMA channel
- *
- * Return: '1' if idle, '0' if not.
- */
-static bool xilinx_vdma_is_idle(struct xilinx_vdma_chan *chan)
-{
-	return vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
-		XILINX_VDMA_DMASR_IDLE;
-}
-
-/**
  * xilinx_vdma_halt - Halt VDMA channel
  * @chan: Driver specific VDMA channel
  */
@@ -614,6 +590,9 @@ static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
 	if (list_empty(&chan->pending_list))
 		return;
 
+	if (!chan->idle)
+		return;
+
 	desc = list_first_entry(&chan->pending_list,
 				struct xilinx_vdma_tx_descriptor, node);
 	tail_desc = list_last_entry(&chan->pending_list,
@@ -622,13 +601,6 @@ static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
 	tail_segment = list_last_entry(&tail_desc->segments,
 				       struct xilinx_vdma_tx_segment, node);
 
-	/* If it is SG mode and hardware is busy, cannot submit */
-	if (chan->has_sg && xilinx_vdma_is_running(chan) &&
-	    !xilinx_vdma_is_idle(chan)) {
-		dev_dbg(chan->dev, "DMA controller still busy\n");
-		return;
-	}
-
 	/*
 	 * If hardware is idle, then all descriptors on the running lists are
 	 * done, start new transfers
@@ -708,6 +680,7 @@ static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
 
 	list_splice_tail_init(&chan->pending_list, &chan->active_list);
 	chan->desc_pendingcount = 0;
+	chan->idle = false;
 }
 
 /**
@@ -854,6 +827,7 @@ static irqreturn_t xilinx_vdma_irq_handler(int irq, void *data)
 	if (status & XILINX_VDMA_DMASR_FRM_CNT_IRQ) {
 		spin_lock(&chan->lock);
 		xilinx_vdma_complete_descriptor(chan);
+		chan->idle = true;
 		xilinx_vdma_start_transfer(chan);
 		spin_unlock(&chan->lock);
 	}
@@ -1212,6 +1186,7 @@ static int xilinx_vdma_chan_probe(struct xilinx_vdma_device *xdev,
 
 	list_add_tail(&chan->common.device_node, &xdev->common.channels);
 	xdev->chan[chan->id] = chan;
+	chan->idle = true;
 
 	/* Reset the channel */
 	err = xilinx_vdma_chan_reset(chan);
-- 
2.1.2

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#1340198 — Re: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking

FromVinod Koul <vinod.koul@intel.com>
Date2016-02-23 04:10 +0100
SubjectRe: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking
Message-ID<r5bwm-7xA-9@gated-at.bofh.it>
In reply to#1339145
On Mon, Feb 22, 2016 at 11:24:37AM +0530, Kedareswara rao Appana wrote:
> This patch improves the channel idle cheking by introduing
				      ^^^^^^^^^
typo

> a new varibale in chan private structure.
	^^^^^^^
here too :(

and there is no description how this improvement is achieved and why
> 
> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> ---
> Changes for v2:
> ---> splitted the changes into multiple patches.
> 
>  drivers/dma/xilinx/xilinx_vdma.c | 41 ++++++++--------------------------------
>  1 file changed, 8 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/dma/xilinx/xilinx_vdma.c b/drivers/dma/xilinx/xilinx_vdma.c
> index 8db07f7..51686d1 100644
> --- a/drivers/dma/xilinx/xilinx_vdma.c
> +++ b/drivers/dma/xilinx/xilinx_vdma.c
> @@ -202,6 +202,7 @@ struct xilinx_vdma_tx_descriptor {
>   * @has_sg: Support scatter transfers
>   * @genlock: Support genlock mode
>   * @err: Channel has errors
> + * @idle: Check for channel idle
>   * @tasklet: Cleanup work after irq
>   * @config: Device configuration info
>   * @flush_on_fsync: Flush on Frame sync
> @@ -225,6 +226,7 @@ struct xilinx_vdma_chan {
>  	bool has_sg;
>  	bool genlock;
>  	bool err;
> +	bool idle;
>  	struct tasklet_struct tasklet;
>  	struct xilinx_vdma_config config;
>  	bool flush_on_fsync;
> @@ -519,32 +521,6 @@ static enum dma_status xilinx_vdma_tx_status(struct dma_chan *dchan,
>  }
>  
>  /**
> - * xilinx_vdma_is_running - Check if VDMA channel is running
> - * @chan: Driver specific VDMA channel
> - *
> - * Return: '1' if running, '0' if not.
> - */
> -static bool xilinx_vdma_is_running(struct xilinx_vdma_chan *chan)
> -{
> -	return !(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
> -		 XILINX_VDMA_DMASR_HALTED) &&
> -		(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
> -		 XILINX_VDMA_DMACR_RUNSTOP);
> -}
> -
> -/**
> - * xilinx_vdma_is_idle - Check if VDMA channel is idle
> - * @chan: Driver specific VDMA channel
> - *
> - * Return: '1' if idle, '0' if not.
> - */
> -static bool xilinx_vdma_is_idle(struct xilinx_vdma_chan *chan)
> -{
> -	return vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
> -		XILINX_VDMA_DMASR_IDLE;
> -}
> -
> -/**
>   * xilinx_vdma_halt - Halt VDMA channel
>   * @chan: Driver specific VDMA channel
>   */
> @@ -614,6 +590,9 @@ static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
>  	if (list_empty(&chan->pending_list))
>  		return;
>  
> +	if (!chan->idle)
> +		return;
> +
>  	desc = list_first_entry(&chan->pending_list,
>  				struct xilinx_vdma_tx_descriptor, node);
>  	tail_desc = list_last_entry(&chan->pending_list,
> @@ -622,13 +601,6 @@ static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
>  	tail_segment = list_last_entry(&tail_desc->segments,
>  				       struct xilinx_vdma_tx_segment, node);
>  
> -	/* If it is SG mode and hardware is busy, cannot submit */
> -	if (chan->has_sg && xilinx_vdma_is_running(chan) &&
> -	    !xilinx_vdma_is_idle(chan)) {
> -		dev_dbg(chan->dev, "DMA controller still busy\n");
> -		return;
> -	}
> -
>  	/*
>  	 * If hardware is idle, then all descriptors on the running lists are
>  	 * done, start new transfers
> @@ -708,6 +680,7 @@ static void xilinx_vdma_start_transfer(struct xilinx_vdma_chan *chan)
>  
>  	list_splice_tail_init(&chan->pending_list, &chan->active_list);
>  	chan->desc_pendingcount = 0;
> +	chan->idle = false;
>  }
>  
>  /**
> @@ -854,6 +827,7 @@ static irqreturn_t xilinx_vdma_irq_handler(int irq, void *data)
>  	if (status & XILINX_VDMA_DMASR_FRM_CNT_IRQ) {
>  		spin_lock(&chan->lock);
>  		xilinx_vdma_complete_descriptor(chan);
> +		chan->idle = true;
>  		xilinx_vdma_start_transfer(chan);
>  		spin_unlock(&chan->lock);
>  	}
> @@ -1212,6 +1186,7 @@ static int xilinx_vdma_chan_probe(struct xilinx_vdma_device *xdev,
>  
>  	list_add_tail(&chan->common.device_node, &xdev->common.channels);
>  	xdev->chan[chan->id] = chan;
> +	chan->idle = true;
>  
>  	/* Reset the channel */
>  	err = xilinx_vdma_chan_reset(chan);
> -- 
> 2.1.2
> 

-- 
~Vinod

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#1340288 — RE: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking

FromAppana Durga Kedareswara Rao <appana.durga.rao@xilinx.com>
Date2016-02-23 05:30 +0100
SubjectRE: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle checking
Message-ID<r5cLN-8ok-13@gated-at.bofh.it>
In reply to#1340198
Hi Vinod,

> -----Original Message-----
> From: Vinod Koul [mailto:vinod.koul@intel.com]
> Sent: Tuesday, February 23, 2016 8:42 AM
> To: Appana Durga Kedareswara Rao
> Cc: dan.j.williams@intel.com; Michal Simek; Soren Brinkmann; Appana Durga
> Kedareswara Rao; moritz.fischer@ettus.com;
> laurent.pinchart@ideasonboard.com; luis@debethencourt.com; Anirudha
> Sarangi; dmaengine@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v2 4/4] dmaengine: xilinx_vdma: Improve channel idle
> checking
> 
> On Mon, Feb 22, 2016 at 11:24:37AM +0530, Kedareswara rao Appana wrote:
> > This patch improves the channel idle cheking by introduing
> 				      ^^^^^^^^^
> typo

Ok will fix.

> 
> > a new varibale in chan private structure.
> 	^^^^^^^
> here too :(

Ok will fix.

> 
> and there is no description how this improvement is achieved and why

Ok will give detailed explanation in the next version of the patch.

Regards,
Kedar.

> >
> > Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
> > ---
> > Changes for v2:
> > ---> splitted the changes into multiple patches.
> >
> >  drivers/dma/xilinx/xilinx_vdma.c | 41
> > ++++++++--------------------------------
> >  1 file changed, 8 insertions(+), 33 deletions(-)
> >
> > diff --git a/drivers/dma/xilinx/xilinx_vdma.c
> > b/drivers/dma/xilinx/xilinx_vdma.c
> > index 8db07f7..51686d1 100644
> > --- a/drivers/dma/xilinx/xilinx_vdma.c
> > +++ b/drivers/dma/xilinx/xilinx_vdma.c
> > @@ -202,6 +202,7 @@ struct xilinx_vdma_tx_descriptor {
> >   * @has_sg: Support scatter transfers
> >   * @genlock: Support genlock mode
> >   * @err: Channel has errors
> > + * @idle: Check for channel idle
> >   * @tasklet: Cleanup work after irq
> >   * @config: Device configuration info
> >   * @flush_on_fsync: Flush on Frame sync @@ -225,6 +226,7 @@ struct
> > xilinx_vdma_chan {
> >  	bool has_sg;
> >  	bool genlock;
> >  	bool err;
> > +	bool idle;
> >  	struct tasklet_struct tasklet;
> >  	struct xilinx_vdma_config config;
> >  	bool flush_on_fsync;
> > @@ -519,32 +521,6 @@ static enum dma_status
> > xilinx_vdma_tx_status(struct dma_chan *dchan,  }
> >
> >  /**
> > - * xilinx_vdma_is_running - Check if VDMA channel is running
> > - * @chan: Driver specific VDMA channel
> > - *
> > - * Return: '1' if running, '0' if not.
> > - */
> > -static bool xilinx_vdma_is_running(struct xilinx_vdma_chan *chan) -{
> > -	return !(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
> > -		 XILINX_VDMA_DMASR_HALTED) &&
> > -		(vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
> > -		 XILINX_VDMA_DMACR_RUNSTOP);
> > -}
> > -
> > -/**
> > - * xilinx_vdma_is_idle - Check if VDMA channel is idle
> > - * @chan: Driver specific VDMA channel
> > - *
> > - * Return: '1' if idle, '0' if not.
> > - */
> > -static bool xilinx_vdma_is_idle(struct xilinx_vdma_chan *chan) -{
> > -	return vdma_ctrl_read(chan, XILINX_VDMA_REG_DMASR) &
> > -		XILINX_VDMA_DMASR_IDLE;
> > -}
> > -
> > -/**
> >   * xilinx_vdma_halt - Halt VDMA channel
> >   * @chan: Driver specific VDMA channel
> >   */
> > @@ -614,6 +590,9 @@ static void xilinx_vdma_start_transfer(struct
> xilinx_vdma_chan *chan)
> >  	if (list_empty(&chan->pending_list))
> >  		return;
> >
> > +	if (!chan->idle)
> > +		return;
> > +
> >  	desc = list_first_entry(&chan->pending_list,
> >  				struct xilinx_vdma_tx_descriptor, node);
> >  	tail_desc = list_last_entry(&chan->pending_list,
> > @@ -622,13 +601,6 @@ static void xilinx_vdma_start_transfer(struct
> xilinx_vdma_chan *chan)
> >  	tail_segment = list_last_entry(&tail_desc->segments,
> >  				       struct xilinx_vdma_tx_segment, node);
> >
> > -	/* If it is SG mode and hardware is busy, cannot submit */
> > -	if (chan->has_sg && xilinx_vdma_is_running(chan) &&
> > -	    !xilinx_vdma_is_idle(chan)) {
> > -		dev_dbg(chan->dev, "DMA controller still busy\n");
> > -		return;
> > -	}
> > -
> >  	/*
> >  	 * If hardware is idle, then all descriptors on the running lists are
> >  	 * done, start new transfers
> > @@ -708,6 +680,7 @@ static void xilinx_vdma_start_transfer(struct
> > xilinx_vdma_chan *chan)
> >
> >  	list_splice_tail_init(&chan->pending_list, &chan->active_list);
> >  	chan->desc_pendingcount = 0;
> > +	chan->idle = false;
> >  }
> >
> >  /**
> > @@ -854,6 +827,7 @@ static irqreturn_t xilinx_vdma_irq_handler(int irq, void
> *data)
> >  	if (status & XILINX_VDMA_DMASR_FRM_CNT_IRQ) {
> >  		spin_lock(&chan->lock);
> >  		xilinx_vdma_complete_descriptor(chan);
> > +		chan->idle = true;
> >  		xilinx_vdma_start_transfer(chan);
> >  		spin_unlock(&chan->lock);
> >  	}
> > @@ -1212,6 +1186,7 @@ static int xilinx_vdma_chan_probe(struct
> > xilinx_vdma_device *xdev,
> >
> >  	list_add_tail(&chan->common.device_node, &xdev-
> >common.channels);
> >  	xdev->chan[chan->id] = chan;
> > +	chan->idle = true;
> >
> >  	/* Reset the channel */
> >  	err = xilinx_vdma_chan_reset(chan);
> > --
> > 2.1.2
> >
> 
> --
> ~Vinod

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