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| Started by | David Daney <ddaney.cavm@gmail.com> |
|---|---|
| First post | 2016-02-23 03:00 +0100 |
| Last post | 2016-02-23 03:10 +0100 |
| Articles | 2 — 1 participant |
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[PATCH v12 0/5] arm64, numa: Add numa support for arm64 platforms David Daney <ddaney.cavm@gmail.com> - 2016-02-23 03:00 +0100
[PATCH v12 2/5] Documentation, dt, numa: dt bindings for NUMA. David Daney <ddaney.cavm@gmail.com> - 2016-02-23 03:10 +0100
| From | David Daney <ddaney.cavm@gmail.com> |
|---|---|
| Date | 2016-02-23 03:00 +0100 |
| Subject | [PATCH v12 0/5] arm64, numa: Add numa support for arm64 platforms |
| Message-ID | <r5aqB-6CU-3@gated-at.bofh.it> |
From: David Daney <david.daney@cavium.com>
v12:
- Replaced 6 patches from Ard Biesheuvel with new simpler, and
more correct, single patch, also from Ard.
v11:
- Dropped cleanup patches for other architectures, they will be
submitted as a separate set after more testing.
- Added patch set from Ard Biesheuvel that are needed to make
the whole thing actually work. Previously this was a
separate set.
- Kconfig and other fixes and simplifications as suggested by Rob Herring.
- Rearranged, refactored and reordered so that we don't patch
new files multiple times.
- Summary:
o 6 patches from Ard Biesheuvel to allow use of
"memory" nodes with efi stub.
o 2 patches to document and add of_numa.c
o 1 patch to add arm64 NUMA support.
o 1 patch to add NUMA balancing support for arm64.
v10:
- Incorporated review comments from Rob Herring.
- Moved numa binding and implementation to devicetree core.
- Added cleanup patch to remove redundant NODE_DATA macro from asm header files
- Include numa balancing support for arm64 patch in this series.
- Fix tile build issue reported by the kbuild robot(patch 7)
v9: - Added cleanup patch to reuse and avoid redefinition of cpumask_of_pcibus
as suggested from Will Deacon and Bjorn Helgaas.
- Including patch to Make pci-host-generic driver numa aware.
- Incorporated comment from Shannon Zhao.
v8:
- Incorporated review comments of Mark Rutland and Will Deacon.
- Added pci helper function and macro for numa.
v7:
- managing numa memory mapping using memblock.
- Incorporated review comments of Mark Rutland.
v6:
- defined and implemented the numa dt binding using
node property proximity and device node distance-map.
- renamed dt_numa to of_numa
v5:
- created base verion of numa.c which creates dummy numa without using dt
on single socket platforms. Then added patches for dt support.
- Incorporated review comments from Hanjun Guo.
v4:
done changes as per Arnd review comments.
v3:
Added changes to support numa on arm64 based platforms.
Tested these patches on cavium's multinode(2 node topology) platform.
In this patchset, defined and implemented dt bindings for numa mapping
for core and memory using device node property arm,associativity.
v2:
Defined and implemented numa map for memory, cores to node and
proximity distance matrix of nodes.
v1:
Initial patchset to support numa on arm64 platforms.
Note: 1. This patchset is tested for NUMA and without NUMA with dt
(both with and without NUMA bindings) on thunderx single
socket and dual socket boards.
Ard Biesheuvel (1):
efi: ARM/arm64: ignore DT memory nodes instead of removing them
Ganapatrao Kulkarni (4):
Documentation, dt, numa: dt bindings for NUMA.
dt, numa: Add NUMA dt binding implementation.
arm64, numa: Add NUMA support for arm64 platforms.
arm64, mm, numa: Add NUMA balancing support for arm64.
Documentation/devicetree/bindings/numa.txt | 272 +++++++++++++++++++
arch/arm64/Kconfig | 27 ++
arch/arm64/include/asm/mmzone.h | 12 +
arch/arm64/include/asm/numa.h | 45 ++++
arch/arm64/include/asm/pgtable.h | 15 ++
arch/arm64/include/asm/topology.h | 10 +
arch/arm64/kernel/pci.c | 10 +
arch/arm64/kernel/setup.c | 4 +
arch/arm64/kernel/smp.c | 4 +
arch/arm64/mm/Makefile | 1 +
arch/arm64/mm/init.c | 34 ++-
arch/arm64/mm/mmu.c | 1 +
arch/arm64/mm/numa.c | 403 +++++++++++++++++++++++++++++
drivers/firmware/efi/arm-init.c | 8 +
drivers/firmware/efi/libstub/fdt.c | 24 +-
drivers/of/Kconfig | 3 +
drivers/of/Makefile | 1 +
drivers/of/of_numa.c | 211 +++++++++++++++
include/linux/of.h | 9 +
19 files changed, 1066 insertions(+), 28 deletions(-)
create mode 100644 Documentation/devicetree/bindings/numa.txt
create mode 100644 arch/arm64/include/asm/mmzone.h
create mode 100644 arch/arm64/include/asm/numa.h
create mode 100644 arch/arm64/mm/numa.c
create mode 100644 drivers/of/of_numa.c
--
1.8.3.1
[toc] | [next] | [standalone]
| From | David Daney <ddaney.cavm@gmail.com> |
|---|---|
| Date | 2016-02-23 03:10 +0100 |
| Subject | [PATCH v12 2/5] Documentation, dt, numa: dt bindings for NUMA. |
| Message-ID | <r5aAh-6VG-7@gated-at.bofh.it> |
| In reply to | #1340175 |
From: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Add DT bindings for numa mapping of memory, CPUs and IOs.
Reviewed-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com>
Signed-off-by: David Daney <david.daney@cavium.com>
---
Documentation/devicetree/bindings/numa.txt | 272 +++++++++++++++++++++++++++++
1 file changed, 272 insertions(+)
create mode 100644 Documentation/devicetree/bindings/numa.txt
diff --git a/Documentation/devicetree/bindings/numa.txt b/Documentation/devicetree/bindings/numa.txt
new file mode 100644
index 0000000..ec5ed7c
--- /dev/null
+++ b/Documentation/devicetree/bindings/numa.txt
@@ -0,0 +1,272 @@
+==============================================================================
+NUMA binding description.
+==============================================================================
+
+==============================================================================
+1 - Introduction
+==============================================================================
+
+Systems employing a Non Uniform Memory Access (NUMA) architecture contain
+collections of hardware resources including processors, memory, and I/O buses,
+that comprise what is commonly known as a NUMA node.
+Processor accesses to memory within the local NUMA node is generally faster
+than processor accesses to memory outside of the local NUMA node.
+DT defines interfaces that allow the platform to convey NUMA node
+topology information to OS.
+
+==============================================================================
+2 - numa-node-id
+==============================================================================
+
+For the purpose of identification, each NUMA node is associated with a unique
+token known as a node id. For the purpose of this binding
+a node id is a 32-bit integer.
+
+A device node is associated with a NUMA node by the presence of a
+numa-node-id property which contains the node id of the device.
+
+Example:
+ /* numa node 0 */
+ numa-node-id = <0>;
+
+ /* numa node 1 */
+ numa-node-id = <1>;
+
+==============================================================================
+3 - distance-map
+==============================================================================
+
+The device tree node distance-map describes the relative
+distance (memory latency) between all numa nodes.
+
+- compatible : Should at least contain "numa-distance-map-v1".
+
+- distance-matrix
+ This property defines a matrix to describe the relative distances
+ between all numa nodes.
+ It is represented as a list of node pairs and their relative distance.
+
+ Note:
+ 1. Each entry represents distance from first node to second node.
+ The distances are equal in either direction.
+ 2. The distance from a node to self (local distance) is represented
+ with value 10 and all internode distance should be represented with
+ a value greater than 10.
+ 3. distance-matrix should have entries in lexicographical ascending
+ order of nodes.
+ 4. There must be only one device node distance-map which must reside in the root node.
+
+Example:
+ 4 nodes connected in mesh/ring topology as below,
+
+ 0_______20______1
+ | |
+ | |
+ 20 20
+ | |
+ | |
+ |_______________|
+ 3 20 2
+
+ if relative distance for each hop is 20,
+ then internode distance would be,
+ 0 -> 1 = 20
+ 1 -> 2 = 20
+ 2 -> 3 = 20
+ 3 -> 0 = 20
+ 0 -> 2 = 40
+ 1 -> 3 = 40
+
+ and dt presentation for this distance matrix is,
+
+ distance-map {
+ compatible = "numa-distance-map-v1";
+ distance-matrix = <0 0 10>,
+ <0 1 20>,
+ <0 2 40>,
+ <0 3 20>,
+ <1 0 20>,
+ <1 1 10>,
+ <1 2 20>,
+ <1 3 40>,
+ <2 0 40>,
+ <2 1 20>,
+ <2 2 10>,
+ <2 3 20>,
+ <3 0 20>,
+ <3 1 40>,
+ <3 2 20>,
+ <3 3 10>;
+ };
+
+==============================================================================
+4 - Example dts
+==============================================================================
+
+Dual socket system consists of 2 boards connected through ccn bus and
+each board having one socket/soc of 8 cpus, memory and pci bus.
+
+ memory@c00000 {
+ device_type = "memory";
+ reg = <0x0 0xc00000 0x0 0x80000000>;
+ /* node 0 */
+ numa-node-id = <0>;
+ };
+
+ memory@10000000000 {
+ device_type = "memory";
+ reg = <0x100 0x0 0x0 0x80000000>;
+ /* node 1 */
+ numa-node-id = <1>;
+ };
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ /* node 0 */
+ numa-node-id = <0>;
+ };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@4 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x4>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@5 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x5>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@6 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x6>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@7 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x7>;
+ enable-method = "psci";
+ numa-node-id = <0>;
+ };
+ cpu@8 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x8>;
+ enable-method = "psci";
+ /* node 1 */
+ numa-node-id = <1>;
+ };
+ cpu@9 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0x9>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ cpu@a {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0xa>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ cpu@b {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0xb>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ cpu@c {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0xc>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ cpu@d {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0xd>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ cpu@e {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0xe>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ cpu@f {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x0 0xf>;
+ enable-method = "psci";
+ numa-node-id = <1>;
+ };
+ };
+
+ pcie0: pcie0@848000000000 {
+ compatible = "arm,armv8";
+ device_type = "pci";
+ bus-range = <0 255>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */
+ ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>;
+ /* node 0 */
+ numa-node-id = <0>;
+ };
+
+ pcie1: pcie1@948000000000 {
+ compatible = "arm,armv8";
+ device_type = "pci";
+ bus-range = <0 255>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0x9480 0x00000000 0 0x10000000>; /* Configuration space */
+ ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>;
+ /* node 1 */
+ numa-node-id = <1>;
+ };
+
+ distance-map {
+ compatible = "numa-distance-map-v1";
+ distance-matrix = <0 0 10>,
+ <0 1 20>,
+ <1 1 10>;
+ };
--
1.8.3.1
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