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| Started by | Will Deacon <will.deacon@arm.com> |
|---|---|
| First post | 2016-02-15 20:50 +0100 |
| Last post | 2016-02-18 14:50 +0100 |
| Articles | 5 — 2 participants |
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Re: [PATCH v3 1/5] arm64/perf: Rename Cortex A57 events Will Deacon <will.deacon@arm.com> - 2016-02-15 20:50 +0100
Re: [PATCH v3 1/5] arm64/perf: Rename Cortex A57 events Will Deacon <will.deacon@arm.com> - 2016-02-15 21:10 +0100
Re: [PATCH v3 1/5] arm64/perf: Rename Cortex A57 events Jan Glauber <jan.glauber@caviumnetworks.com> - 2016-02-18 10:30 +0100
Re: [PATCH v3 1/5] arm64/perf: Rename Cortex A57 events Will Deacon <will.deacon@arm.com> - 2016-02-18 12:30 +0100
Re: [PATCH v3 1/5] arm64/perf: Rename Cortex A57 events Jan Glauber <jan.glauber@caviumnetworks.com> - 2016-02-18 14:50 +0100
| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2016-02-15 20:50 +0100 |
| Subject | Re: [PATCH v3 1/5] arm64/perf: Rename Cortex A57 events |
| Message-ID | <r2xjJ-5z4-35@gated-at.bofh.it> |
On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote: > The implemented Cortex A57 events are not A57 specific. > They are recommended by ARM and can be found on other > ARMv8 SOCs like Cavium ThunderX too. Therefore move > these events to the common PMUv3 table. I can't find anything in the architecture that suggests these event numbers are necessarily portable between implementations. Am I missing something? Will
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| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2016-02-15 21:10 +0100 |
| Message-ID | <r2xD4-5Wh-17@gated-at.bofh.it> |
| In reply to | #1334768 |
On Mon, Feb 15, 2016 at 07:40:37PM +0000, Will Deacon wrote: > On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote: > > The implemented Cortex A57 events are not A57 specific. > > They are recommended by ARM and can be found on other > > ARMv8 SOCs like Cavium ThunderX too. Therefore move > > these events to the common PMUv3 table. > > I can't find anything in the architecture that suggests these event > numbers are necessarily portable between implementations. Am I missing > something? Aha, I just noticed appendix K3.1 (silly me for missing it...). Lemme check whether or not that mandates that those encodings can't be used for wildly different things. Will
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| From | Jan Glauber <jan.glauber@caviumnetworks.com> |
|---|---|
| Date | 2016-02-18 10:30 +0100 |
| Message-ID | <r3t4n-3rL-31@gated-at.bofh.it> |
| In reply to | #1334782 |
On Mon, Feb 15, 2016 at 08:06:13PM +0000, Will Deacon wrote: > On Mon, Feb 15, 2016 at 07:40:37PM +0000, Will Deacon wrote: > > On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote: > > > The implemented Cortex A57 events are not A57 specific. > > > They are recommended by ARM and can be found on other > > > ARMv8 SOCs like Cavium ThunderX too. Therefore move > > > these events to the common PMUv3 table. > > > > I can't find anything in the architecture that suggests these event > > numbers are necessarily portable between implementations. Am I missing > > something? > > Aha, I just noticed appendix K3.1 (silly me for missing it...). > > Lemme check whether or not that mandates that those encodings can't be > used for wildly different things. To me it looks like we would just have duplicated code without the patch, and at least the event types (e.g. L1D_CACHE_RD) should be identical across implementations. But I don't care too much, so please tell me if should drop the patch or keep it. thanks, Jan > Will
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| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2016-02-18 12:30 +0100 |
| Message-ID | <r3uWu-4Ju-7@gated-at.bofh.it> |
| In reply to | #1337191 |
On Thu, Feb 18, 2016 at 10:13:07AM +0100, Jan Glauber wrote: > On Mon, Feb 15, 2016 at 08:06:13PM +0000, Will Deacon wrote: > > On Mon, Feb 15, 2016 at 07:40:37PM +0000, Will Deacon wrote: > > > On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote: > > > > The implemented Cortex A57 events are not A57 specific. > > > > They are recommended by ARM and can be found on other > > > > ARMv8 SOCs like Cavium ThunderX too. Therefore move > > > > these events to the common PMUv3 table. > > > > > > I can't find anything in the architecture that suggests these event > > > numbers are necessarily portable between implementations. Am I missing > > > something? > > > > Aha, I just noticed appendix K3.1 (silly me for missing it...). > > > > Lemme check whether or not that mandates that those encodings can't be > > used for wildly different things. > > To me it looks like we would just have duplicated code without the patch, > and at least the event types (e.g. L1D_CACHE_RD) should be identical > across implementations. > > But I don't care too much, so please tell me if should drop the patch or > keep it. Tell you what then -- how about we simply rename those to ARMV8_IMPDEF_* instead of ARMV8_A57_*? That way, we can easily identify them as distinct from the architected events if we need to in future. Will
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| From | Jan Glauber <jan.glauber@caviumnetworks.com> |
|---|---|
| Date | 2016-02-18 14:50 +0100 |
| Message-ID | <r3x7Y-6f7-11@gated-at.bofh.it> |
| In reply to | #1337287 |
On Thu, Feb 18, 2016 at 11:24:29AM +0000, Will Deacon wrote: > On Thu, Feb 18, 2016 at 10:13:07AM +0100, Jan Glauber wrote: > > On Mon, Feb 15, 2016 at 08:06:13PM +0000, Will Deacon wrote: > > > On Mon, Feb 15, 2016 at 07:40:37PM +0000, Will Deacon wrote: > > > > On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote: > > > > > The implemented Cortex A57 events are not A57 specific. > > > > > They are recommended by ARM and can be found on other > > > > > ARMv8 SOCs like Cavium ThunderX too. Therefore move > > > > > these events to the common PMUv3 table. > > > > > > > > I can't find anything in the architecture that suggests these event > > > > numbers are necessarily portable between implementations. Am I missing > > > > something? > > > > > > Aha, I just noticed appendix K3.1 (silly me for missing it...). > > > > > > Lemme check whether or not that mandates that those encodings can't be > > > used for wildly different things. > > > > To me it looks like we would just have duplicated code without the patch, > > and at least the event types (e.g. L1D_CACHE_RD) should be identical > > across implementations. > > > > But I don't care too much, so please tell me if should drop the patch or > > keep it. > > Tell you what then -- how about we simply rename those to ARMV8_IMPDEF_* > instead of ARMV8_A57_*? That way, we can easily identify them as distinct > from the architected events if we need to in future. Sounds good. I'll refresh and re-post the whole series then. Jan > Will
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