Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1334210 > unrolled thread
| Started by | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| First post | 2016-02-15 08:40 +0100 |
| Last post | 2016-02-16 00:30 +0100 |
| Articles | 7 — 3 participants |
Back to article view | Back to linux.kernel
[RESEND PATCH 0/8] Support and fixes the rk3228 SoCS for thermal Caesar Wang <wxt@rock-chips.com> - 2016-02-15 08:40 +0100
[RESEND PATCH 3/8] thermal: rockchip: fix a impossible condition caused by the warning Caesar Wang <wxt@rock-chips.com> - 2016-02-15 08:40 +0100
[RESEND PATCH 4/8] thermal: rockchip: fix calculation error for code_to_temp Caesar Wang <wxt@rock-chips.com> - 2016-02-15 08:40 +0100
[RESEND PATCH 1/8] clk: rockchip: add id of the tsadc clock found on rk3228 SoCs Caesar Wang <wxt@rock-chips.com> - 2016-02-15 08:40 +0100
Re: [RESEND PATCH 1/8] clk: rockchip: add id of the tsadc clock found on rk3228 SoCs Michael Turquette <mturquette@baylibre.com> - 2016-02-17 00:00 +0100
[RESEND PATCH 6/8] thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399 Caesar Wang <wxt@rock-chips.com> - 2016-02-15 08:40 +0100
Re: [RESEND PATCH 0/8] Support and fixes the rk3228 SoCS for thermal Heiko Stuebner <heiko@sntech.de> - 2016-02-16 00:30 +0100
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-02-15 08:40 +0100 |
| Subject | [RESEND PATCH 0/8] Support and fixes the rk3228 SoCS for thermal |
| Message-ID | <r2lVf-6g1-5@gated-at.bofh.it> |
Hello Eduardo, Heiko, Michael & Stephen: This series pacthes to support the rk3228 SoCs thermal. They have the following patches to work on rk3228 SoCs. 1a6f334 clk: rockchip: add id of the tsadc clock found on rk3228 SoCs 8cf2d1b clk: rockchip: add the tsadc clocks found on rk3228 SoCs bd2720c thermal: rockchip: fix a impossible condition caused by the warning df9c1bd thermal: rockchip: fix calculation error for code_to_temp fb11fbd thermal: rockchip: the rename compatibles for rockchip SoCs b907b75 thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399 bdc79c0 ARM: dts: rockchip: add the thermal main info found on rk3228 22ea3c3 ARM: dts: rockchip: enable the tsadc for rk3228 evb Verified on https://github.com/Caesar-github/rockchip/tree/rk3228-thermal-tests. This series patches are based on Linux version 4.5.0-rc4+ (wxt@ubuntu) (...) (GCC) ) #204 SMP Mon Feb 15 14:12:16 CST 6 Tests: 1) Get the temperature in every 500ms. while true;do ls >/dev/null; done& while true; do grep "" /sys/class/thermal/thermal_zone0/temp; sleep .5; done & 2) critical tests ** /sys/devices/virtual/thermal/thermal_zone0 # cat temp 33000 /sys/devices/virtual/thermal/thermal_zone0 # echo 30000 > trip_point_2_temp [ 988.114192] thermal thermal_zone0: critical temperature reached(33 C),shutting down ... shutdown - **via modify the dts over-temperature protectiong value to trigger otp pin. Verified on rk3228/rk3288/rk3368 SoCs. --- Hi Michael,Stephen PATCH[1/8-2/8]: Add the tsadc needed clocks for rk3228 SoCs Hi Eduardo, PATCH[3/8]: To fix a build warning came from Dan Carpenter report smatch check, Thanks. As the patch exists in https://patchwork.kernel.org/patch/7757311/ PATCH[4/8]: fix calculation error for code_to_temp That's a error since the copy causes. PATCH[5/8]: the rename compatibles for rockchip SoCs As the more and more rockchip SOCs are supported in thermal driver. this pacth supposed to be compatible for better. PATCH[6/8]: fix the tsadc sequence output on rk3228/rk3399 Fixes the tsadc sequence output since the rk3228/rk3399 SoCs design. Hi Heiko, PATCH[7/8-8/8]: thermal DTS 1) add the thermal main info found on rk3228 2) enable the tsadc for rk3228 evb I'd appreciate if someone have free time to review that. :) Caesar Wang (7): clk: rockchip: add id of the tsadc clock found on rk3228 SoCs clk: rockchip: add the tsadc clocks found on rk3228 SoCs thermal: rockchip: fix a impossible condition caused by the warning thermal: rockchip: the rename compatibles for rockchip SoCs thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399 ARM: dts: rockchip: add the thermal main info found on rk3228 ARM: dts: rockchip: enable the tsadc for rk3228 evb Elaine Zhang (1): thermal: rockchip: fix calculation error for code_to_temp arch/arm/boot/dts/rk3228-evb.dts | 7 + arch/arm/boot/dts/rk3228.dtsi | 69 ++++++++++ drivers/clk/rockchip/clk-rk3228.c | 4 +- drivers/thermal/rockchip_thermal.c | 239 +++++++++++++++++++-------------- include/dt-bindings/clock/rk3228-cru.h | 2 + 5 files changed, 216 insertions(+), 105 deletions(-) -- 1.9.1
[toc] | [next] | [standalone]
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-02-15 08:40 +0100 |
| Subject | [RESEND PATCH 3/8] thermal: rockchip: fix a impossible condition caused by the warning |
| Message-ID | <r2lVg-6g1-31@gated-at.bofh.it> |
| In reply to | #1334210 |
As the Dan report the smatch check the thermal driver warning:
drivers/thermal/rockchip_thermal.c:551 rockchip_configure_from_dt()
warn: impossible condition '(thermal->tshut_temp > ((~0 >> 1))) =>
(s32min-s32max > s32max)'
Although The shut_temp read from DT is u32,the temperature is currently
represented as int not long in the thermal driver.
Let's change to make shut_temp instead of the thermal->tshut_temp for
the condition.
Fixes: commit 437df2172e8d
("thermal: rockchip: consistently use int for temperatures")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
drivers/thermal/rockchip_thermal.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index b58e3fb..433085a 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -693,15 +693,14 @@ static int rockchip_configure_from_dt(struct device *dev,
thermal->chip->tshut_temp);
thermal->tshut_temp = thermal->chip->tshut_temp;
} else {
+ if (shut_temp > INT_MAX) {
+ dev_err(dev, "Invalid tshut temperature specified: %d\n",
+ shut_temp);
+ return -ERANGE;
+ }
thermal->tshut_temp = shut_temp;
}
- if (thermal->tshut_temp > INT_MAX) {
- dev_err(dev, "Invalid tshut temperature specified: %d\n",
- thermal->tshut_temp);
- return -ERANGE;
- }
-
if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
dev_warn(dev,
"Missing tshut mode property, using default (%s)\n",
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-02-15 08:40 +0100 |
| Subject | [RESEND PATCH 4/8] thermal: rockchip: fix calculation error for code_to_temp |
| Message-ID | <r2lVg-6g1-29@gated-at.bofh.it> |
| In reply to | #1334210 |
From: Elaine Zhang <zhangqing@rock-chips.com> the calculation use a global table, not their own table. so adapt the table to the correct one. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> --- drivers/thermal/rockchip_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 433085a..5c58d48 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -411,7 +411,7 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code, * temperature between 2 table entries is linear and interpolate * to produce less granular result. */ - num = table.id[mid].temp - v2_code_table[mid - 1].temp; + num = table.id[mid].temp - table.id[mid - 1].temp; num *= abs(table.id[mid - 1].code - code); denom = abs(table.id[mid - 1].code - table.id[mid].code); *temp = table.id[mid - 1].temp + (num / denom); -- 1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-02-15 08:40 +0100 |
| Subject | [RESEND PATCH 1/8] clk: rockchip: add id of the tsadc clock found on rk3228 SoCs |
| Message-ID | <r2lVh-6g1-33@gated-at.bofh.it> |
| In reply to | #1334210 |
This patch adds 'SCLK_TSADC' and 'PCLK_TSADC' id found on rk3228 SoCs. That will be needed by TSADC controller. Signed-off-by: Caesar Wang <wxt@rock-chips.com> --- include/dt-bindings/clock/rk3228-cru.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h index a78dd89..cd2e06b 100644 --- a/include/dt-bindings/clock/rk3228-cru.h +++ b/include/dt-bindings/clock/rk3228-cru.h @@ -29,6 +29,7 @@ #define SCLK_SDMMC 68 #define SCLK_SDIO 69 #define SCLK_EMMC 71 +#define SCLK_TSADC 72 #define SCLK_UART0 77 #define SCLK_UART1 78 #define SCLK_UART2 79 @@ -68,6 +69,7 @@ #define PCLK_UART0 341 #define PCLK_UART1 342 #define PCLK_UART2 343 +#define PCLK_TSADC 344 #define PCLK_PWM 350 #define PCLK_TIMER 353 #define PCLK_PERI 363 -- 1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Michael Turquette <mturquette@baylibre.com> |
|---|---|
| Date | 2016-02-17 00:00 +0100 |
| Subject | Re: [RESEND PATCH 1/8] clk: rockchip: add id of the tsadc clock found on rk3228 SoCs |
| Message-ID | <r2WL8-5PS-23@gated-at.bofh.it> |
| In reply to | #1334214 |
Quoting Caesar Wang (2016-02-14 23:33:26) > This patch adds 'SCLK_TSADC' and 'PCLK_TSADC' id found on rk3228 SoCs. > That will be needed by TSADC controller. > > Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Michael Turquette <mturquette@baylibre.com> > --- > > include/dt-bindings/clock/rk3228-cru.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h > index a78dd89..cd2e06b 100644 > --- a/include/dt-bindings/clock/rk3228-cru.h > +++ b/include/dt-bindings/clock/rk3228-cru.h > @@ -29,6 +29,7 @@ > #define SCLK_SDMMC 68 > #define SCLK_SDIO 69 > #define SCLK_EMMC 71 > +#define SCLK_TSADC 72 > #define SCLK_UART0 77 > #define SCLK_UART1 78 > #define SCLK_UART2 79 > @@ -68,6 +69,7 @@ > #define PCLK_UART0 341 > #define PCLK_UART1 342 > #define PCLK_UART2 343 > +#define PCLK_TSADC 344 > #define PCLK_PWM 350 > #define PCLK_TIMER 353 > #define PCLK_PERI 363 > -- > 1.9.1 >
[toc] | [prev] | [next] | [standalone]
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-02-15 08:40 +0100 |
| Subject | [RESEND PATCH 6/8] thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399 |
| Message-ID | <r2lVh-6g1-37@gated-at.bofh.it> |
| In reply to | #1334210 |
As the TRM says, add the tsadc_q_sel to control the temperature-code
sequence since the rk3228/rk3399 need set this bit (1024 - tsadc_q)
as output.
Fixes: commit
b0d7033 "thermal: rockchip: Support the RK3399 SoCs in thermal driver"
7b02a5e "thermal: rockchip: Support the RK3228 SoCs in thermal driver"
Reported-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
drivers/thermal/rockchip_thermal.c | 176 +++++++++++++++++++++----------------
1 file changed, 102 insertions(+), 74 deletions(-)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 9cdef62..233a564 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -155,6 +155,13 @@ struct rockchip_thermal_data {
#define TSADCV2_AUTO_EN BIT(0)
#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
+/**
+ * TSADCV1_AUTO_Q_SEL_EN:
+ * whether select (1024 - tsadc_q) as output
+ * 1'b0:use tsadc_q as output(temperature-code is rising sequence)
+ * 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
+ */
+#define TSADCV3_AUTO_Q_SEL_EN BIT(1)
#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
@@ -184,41 +191,42 @@ struct tsadc_table {
* Code to Temperature mapping should be updated based on sillcon results.
*/
static const struct tsadc_table rk3228_code_table[] = {
- {TSADCV3_DATA_MASK, -40000},
- {436, -40000},
- {431, -35000},
- {426, -30000},
- {421, -25000},
- {416, -20000},
- {411, -15000},
- {406, -10000},
- {401, -5000},
- {395, 0},
- {390, 5000},
- {385, 10000},
- {380, 15000},
- {375, 20000},
- {370, 25000},
- {364, 30000},
- {359, 35000},
- {354, 40000},
- {349, 45000},
- {343, 50000},
- {338, 55000},
- {333, 60000},
- {328, 65000},
- {322, 70000},
- {317, 75000},
- {312, 80000},
- {307, 85000},
- {301, 90000},
- {296, 95000},
- {291, 100000},
- {286, 105000},
- {280, 110000},
- {275, 115000},
- {270, 120000},
- {264, 125000},
+ {0, -40000},
+ {588, -40000},
+ {593, -35000},
+ {598, -30000},
+ {603, -25000},
+ {608, -20000},
+ {613, -15000},
+ {618, -10000},
+ {623, -5000},
+ {629, 0},
+ {634, 5000},
+ {639, 10000},
+ {644, 15000},
+ {649, 20000},
+ {654, 25000},
+ {660, 30000},
+ {665, 35000},
+ {670, 40000},
+ {675, 45000},
+ {681, 50000},
+ {686, 55000},
+ {691, 60000},
+ {696, 65000},
+ {702, 70000},
+ {707, 75000},
+ {712, 80000},
+ {717, 85000},
+ {723, 90000},
+ {728, 95000},
+ {733, 100000},
+ {738, 105000},
+ {744, 110000},
+ {749, 115000},
+ {754, 120000},
+ {760, 125000},
+ {TSADCV2_DATA_MASK, 125000},
};
static const struct tsadc_table rk3288_code_table[] = {
@@ -299,41 +307,42 @@ static const struct tsadc_table rk3368_code_table[] = {
};
static const struct tsadc_table rk3399_code_table[] = {
- {TSADCV3_DATA_MASK, -40000},
- {431, -40000},
- {426, -35000},
- {421, -30000},
- {415, -25000},
- {410, -20000},
- {405, -15000},
- {399, -10000},
- {394, -5000},
- {389, 0},
- {383, 5000},
- {378, 10000},
- {373, 15000},
- {367, 20000},
- {362, 25000},
- {357, 30000},
- {351, 35000},
- {346, 40000},
- {340, 45000},
- {335, 50000},
- {330, 55000},
- {324, 60000},
- {319, 65000},
- {313, 70000},
- {308, 75000},
- {302, 80000},
- {297, 85000},
- {291, 90000},
- {286, 95000},
- {281, 100000},
- {275, 105000},
- {270, 110000},
- {264, 115000},
- {259, 120000},
- {253, 125000},
+ {0, -40000},
+ {593, -40000},
+ {598, -35000},
+ {603, -30000},
+ {609, -25000},
+ {614, -20000},
+ {619, -15000},
+ {625, -10000},
+ {630, -5000},
+ {635, 0},
+ {641, 5000},
+ {646, 10000},
+ {651, 15000},
+ {657, 20000},
+ {662, 25000},
+ {667, 30000},
+ {673, 35000},
+ {678, 40000},
+ {684, 45000},
+ {689, 50000},
+ {694, 55000},
+ {700, 60000},
+ {705, 65000},
+ {711, 70000},
+ {716, 75000},
+ {722, 80000},
+ {727, 85000},
+ {733, 90000},
+ {738, 95000},
+ {743, 100000},
+ {749, 105000},
+ {754, 110000},
+ {760, 115000},
+ {765, 120000},
+ {771, 125000},
+ {TSADCV3_DATA_MASK, 125000},
};
static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
@@ -488,6 +497,25 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
writel_relaxed(val, regs + TSADCV2_AUTO_CON);
}
+/**
+ * @rk_tsadcv3_control:
+ * TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
+ * bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
+ * setting this bit to enable.
+ */
+static void rk_tsadcv3_control(void __iomem *regs, bool enable)
+{
+ u32 val;
+
+ val = readl_relaxed(regs + TSADCV2_AUTO_CON);
+ if (enable)
+ val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
+ else
+ val &= ~TSADCV2_AUTO_EN;
+
+ writel_relaxed(val, regs + TSADCV2_AUTO_CON);
+}
+
static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
int chn, void __iomem *regs, int *temp)
{
@@ -538,7 +566,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
.initialize = rk_tsadcv2_initialize,
.irq_ack = rk_tsadcv3_irq_ack,
- .control = rk_tsadcv2_control,
+ .control = rk_tsadcv3_control,
.get_temp = rk_tsadcv2_get_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
@@ -547,7 +575,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
.id = rk3228_code_table,
.length = ARRAY_SIZE(rk3228_code_table),
.data_mask = TSADCV3_DATA_MASK,
- .mode = ADC_DECREMENT,
+ .mode = ADC_INCREMENT,
},
};
@@ -610,7 +638,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
.initialize = rk_tsadcv2_initialize,
.irq_ack = rk_tsadcv3_irq_ack,
- .control = rk_tsadcv2_control,
+ .control = rk_tsadcv3_control,
.get_temp = rk_tsadcv2_get_temp,
.set_tshut_temp = rk_tsadcv2_tshut_temp,
.set_tshut_mode = rk_tsadcv2_tshut_mode,
@@ -619,7 +647,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
.id = rk3399_code_table,
.length = ARRAY_SIZE(rk3399_code_table),
.data_mask = TSADCV3_DATA_MASK,
- .mode = ADC_DECREMENT,
+ .mode = ADC_INCREMENT,
},
};
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Heiko Stuebner <heiko@sntech.de> |
|---|---|
| Date | 2016-02-16 00:30 +0100 |
| Message-ID | <r2AKC-7Tu-11@gated-at.bofh.it> |
| In reply to | #1334210 |
Am Montag, 15. Februar 2016, 15:33:25 schrieb Caesar Wang: > Hello Eduardo, Heiko, Michael & Stephen: > > This series pacthes to support the rk3228 SoCs thermal. > > They have the following patches to work on rk3228 SoCs. > > 1a6f334 clk: rockchip: add id of the tsadc clock found on rk3228 SoCs > 8cf2d1b clk: rockchip: add the tsadc clocks found on rk3228 SoCs > bdc79c0 ARM: dts: rockchip: add the thermal main info found on rk3228 > 22ea3c3 ARM: dts: rockchip: enable the tsadc for rk3228 evb clk and devicetree patches look good and I'll pick those up once Eduardo is ok with (and has taken) the thermal-specific changes: > bd2720c thermal: rockchip: fix a impossible condition caused by the > warning df9c1bd thermal: rockchip: fix calculation error for code_to_temp > fb11fbd thermal: rockchip: the rename compatibles for rockchip SoCs > b907b75 thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399 Heiko
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web