Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1331594 > unrolled thread

[PATCH 1/2] ARM: dts: vf610twr: assign Ethernet clock explicitly

Started byStefan Agner <stefan@agner.ch>
First post2016-02-11 01:10 +0100
Last post2016-02-14 09:00 +0100
Articles 2 — 2 participants

Back to article view | Back to linux.kernel


Contents

  [PATCH 1/2] ARM: dts: vf610twr: assign Ethernet clock explicitly Stefan Agner <stefan@agner.ch> - 2016-02-11 01:10 +0100
    Re: [PATCH 1/2] ARM: dts: vf610twr: assign Ethernet clock explicitly Shawn Guo <shawnguo@kernel.org> - 2016-02-14 09:00 +0100

#1331594 — [PATCH 1/2] ARM: dts: vf610twr: assign Ethernet clock explicitly

FromStefan Agner <stefan@agner.ch>
Date2016-02-11 01:10 +0100
Subject[PATCH 1/2] ARM: dts: vf610twr: assign Ethernet clock explicitly
Message-ID<r0MZz-10t-5@gated-at.bofh.it>
Assign Ethernet clock parents explicitly. The VF610 Tower Board
uses the external Ethernet clock input which is connected to
a 50MHz clock.

The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which
use the same clock source (VF610_CLK_ENET). Therefore this parent
configuration affects multiple consumer devices and need to be
specified in the clock provider node.

Signed-off-by: Stefan Agner <stefan@agner.ch>
---
So far we rely on the boot loader to configure this, however it
can be problematic e.g. for suspend/resume...

--
Stefan

 arch/arm/boot/dts/vf610-twr.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index 5438ee4..8419c06 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -96,6 +96,10 @@
 &clks {
 	clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
 	clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
+	assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
+			  <&clks VF610_CLK_ENET_TS_SEL>;
+	assigned-clock-parents = <&clks VF610_CLK_ENET_EXT>,
+				 <&clks VF610_CLK_ENET_EXT>;
 };
 
 &dspi0 {
-- 
2.7.1

[toc] | [next] | [standalone]


#1333450

FromShawn Guo <shawnguo@kernel.org>
Date2016-02-14 09:00 +0100
Message-ID<r1ZL4-8cu-3@gated-at.bofh.it>
In reply to#1331594
On Wed, Feb 10, 2016 at 04:02:25PM -0800, Stefan Agner wrote:
> Assign Ethernet clock parents explicitly. The VF610 Tower Board
> uses the external Ethernet clock input which is connected to
> a 50MHz clock.
> 
> The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which
> use the same clock source (VF610_CLK_ENET). Therefore this parent
> configuration affects multiple consumer devices and need to be
> specified in the clock provider node.
> 
> Signed-off-by: Stefan Agner <stefan@agner.ch>

Applied both, thanks.

[toc] | [prev] | [standalone]


Back to top | Article view | linux.kernel


csiph-web