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Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver

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  Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver Daniel Lezcano <daniel.lezcano@linaro.org> - 2016-02-08 15:30 +0100
    RE: [PATCH v3 2/3] clocksource: Add NPS400 timers driver Noam Camus <noamc@ezchip.com> - 2016-02-09 14:20 +0100
      Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver Daniel Lezcano <daniel.lezcano@linaro.org> - 2016-02-09 14:40 +0100
        Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver Noam Camus <noamc@ezchip.com> - 2016-02-09 23:10 +0100
          Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver Daniel Lezcano <daniel.lezcano@linaro.org> - 2016-02-10 00:00 +0100
            RE: [PATCH v3 2/3] clocksource: Add NPS400 timers driver Noam Camus <noamc@ezchip.com> - 2016-02-10 09:20 +0100

#1329105 — Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver

On 02/06/2016 05:16 PM, Noam Camus wrote:
> From: Noam Camus <noamc@ezchip.com>
>
> Add internal tick generator which is shared by all cores.
> Each cluster of cores view it through dedicated address.
> This is used for SMP system where all CPUs synced by same
> clock source.
>
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: John Stultz <john.stultz@linaro.org>
> Acked-by: Vineet Gupta <vgupta@synopsys.com>
> ---

[ ... ]

> +static cycle_t nps_clksrc_read(struct clocksource *clksrc)
> +{
> +	int cluster = raw_smp_processor_id() >> NPS_CLUSTER_OFFSET;
> +
> +	return (cycle_t)ioread32be(nps_msu_reg_low_addr[cluster]);
> +}
> +
> +static struct clocksource nps_counter = {
> +	.name	= "EZnps-tick",
> +	.rating = 301,
> +	.read   = nps_clksrc_read,
> +	.mask   = CLOCKSOURCE_MASK(32),
> +	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
> +};
> +
> +static void __init nps_setup_clocksource(struct device_node *node,
> +					 struct clk *clk)
> +{
> +	struct clocksource *clksrc = &nps_counter;
> +	int ret, cluster;
> +
> +	for (cluster = 0; cluster < NPS_CLUSTER_NUM; cluster++)
> +		nps_msu_reg_low_addr[cluster] =
> +			nps_host_reg((cluster << NPS_CLUSTER_OFFSET),
> +				 NPS_MSU_BLKID, NPS_MSU_TICK_LOW);
> +
> +	ret = clk_prepare_enable(clk);
> +	if (ret)
> +		pr_err("Couldn't enable parent clock\n");
> +
> +	nps_timer_rate = clk_get_rate(clk);

If there is an error, you continue the execution of the code. I guess 
you expect the system to hang in any case with the error in the console, 
right ?

> +	ret = clocksource_register_hz(clksrc, nps_timer_rate);

You can simplify the driver even more by using clocksource_mmio_init.

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#1330224

>From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org] 
>Sent: Monday, February 08, 2016 4:22 PM

>> +	ret = clk_prepare_enable(clk);
>> +	if (ret)
>> +		pr_err("Couldn't enable parent clock\n");
>> +
>> +	nps_timer_rate = clk_get_rate(clk);

>If there is an error, you continue the execution of the code. I guess you expect the system to hang in any case with the error in the >console, right ?

Since our clock is root then returned value will always be valid.
I am far from being expert here, but no one checks for clk_get_rate() return value for error.
Could you refer to a single place at clocksource drivers that checks for error in the return value.

>> +	ret = clocksource_register_hz(clksrc, nps_timer_rate);

>You can simplify the driver even more by using clocksource_mmio_init.
Since my base address depends on cluster number, which CPU is part of,  this interface is not much of a use. On top of that it assumes that I am little endian by using readl family accessories.

-Noam

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#1330236

On 02/09/2016 01:36 PM, Noam Camus wrote:
>> From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org] Sent:
>> Monday, February 08, 2016 4:22 PM
>
>>> +	ret = clk_prepare_enable(clk); +	if (ret) +		pr_err("Couldn't
>>> enable parent clock\n"); + +	nps_timer_rate = clk_get_rate(clk);
>
>> If there is an error, you continue the execution of the code. I
>> guess you expect the system to hang in any case with the error in
>> the >console, right ?
>
> Since our clock is root then returned value will always be valid. I
> am far from being expert here, but no one checks for clk_get_rate()
> return value for error. Could you refer to a single place at
> clocksource drivers that checks for error in the return value.

Actually I was referring to clk_prepare_enable, clocksource_register_hz.
Agree clk_get_rate is always valid.

>>> +	ret = clocksource_register_hz(clksrc, nps_timer_rate);
>
>> You can simplify the driver even more by using
>> clocksource_mmio_init.
> Since my base address depends on cluster number, which CPU is part
> of,  this interface is not much of a use. On top of that it assumes
> that I am little endian by using readl family accessories.

Why can't you use ?

clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick", 
nps_timer_rate, 32, nps_clksrc_read);



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#1330679

>From: Daniel Lezcano <daniel.lezcano@linaro.org>
>Sent: Tuesday, February 9, 2016 3:38 PM

>Actually I was referring to clk_prepare_enable, clocksource_register_hz.
>Agree clk_get_rate is always valid.
Thanks for making this clear.
Any way as you can see I do call pr_err() in case of error just like most drivers around.
By "hang" do you mean calling panic()?
What if there is another clocksource in DT (even with worse rating)?
I still prefer using it then having non workable machine.

>>
>>> You can simplify the driver even more by using
>>> clocksource_mmio_init.
>> Since my base address depends on cluster number, which CPU is part
>> of,  this interface is not much of a use. On top of that it assumes
>> that I am little endian by using readl family accessories.

>Why can't you use ?

>clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick",
>nps_timer_rate, 32, nps_clksrc_read);

I believe that the simplification is meant for drivers that can actually use the clocksource_mmio..() accessories. Could you explain what is the advantage here, for my case, to use clocksource_mmio driver?

Thanks for your patience
-Noam

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#1330720

On 02/09/2016 10:47 PM, Noam Camus wrote:
>> From: Daniel Lezcano <daniel.lezcano@linaro.org> Sent: Tuesday,
>> February 9, 2016 3:38 PM
>
>> Actually I was referring to clk_prepare_enable,
>> clocksource_register_hz. Agree clk_get_rate is always valid.
> Thanks for making this clear. Any way as you can see I do call
> pr_err() in case of error just like most drivers around. By "hang" do
> you mean calling panic()?

No. I meant the errors are caught but no action is taken, the execution
continues normally as nothing wrong happened. This is why I asked if you
expect the host to hang at boot time with the last error as a hint.

I was expecting to see a call to clk_disable_unprepare if
clocksource_register_hz fails, and returning 'ret' if clk_prepare_enable
fails.

> What if there is another clocksource in DT (even with worse rating)?
> I still prefer using it then having non workable machine.

You are right. This is why failing gracefully in the init function is
important.

>>>> You can simplify the driver even more by using
>>>> clocksource_mmio_init.
>>> Since my base address depends on cluster number, which CPU is
>>> part of,  this interface is not much of a use. On top of that it
>>> assumes that I am little endian by using readl family
>>> accessories.
>
>> Why can't you use ?
>
>> clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick",
>> nps_timer_rate, 32, nps_clksrc_read);
>
> I believe that the simplification is meant for drivers that can
> actually use the clocksource_mmio..() accessories. Could you explain
> what is the advantage here, for my case, to use clocksource_mmio
> driver?

Using the mmio generic code will save:

+static struct clocksource nps_counter = {
+	.name	= "EZnps-tick",
+	.rating = 301,
+	.read   = nps_clksrc_read,
+	.mask   = CLOCKSOURCE_MASK(32),
+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};

Up to you.

   -- Daniel

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#1330941

>From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org] 
>Sent: Wednesday, February 10, 2016 12:55 AM

>> pr_err() in case of error just like most drivers around. By "hang" do 
>> you mean calling panic()?

>No. I meant the errors are caught but no action is taken, the execution continues normally as nothing wrong happened. This is why I asked if you expect the host to hang at boot time with the last error as a hint.

>I was expecting to see a call to clk_disable_unprepare if clocksource_register_hz fails, and returning 'ret' if clk_prepare_enable fails.
Ok, I will fix that, and handle gracefull return. Thanks


>Using the mmio generic code will save:

>+static struct clocksource nps_counter = {
>+	.name	= "EZnps-tick",
>+	.rating = 301,
>+	.read   = nps_clksrc_read,
>+	.mask   = CLOCKSOURCE_MASK(32),
>+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
>+};

>Up to you.
I will do that, thanks again

Noam

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