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| Started by | Chris Metcalf <cmetcalf@ezchip.com> |
|---|---|
| First post | 2015-11-23 23:10 +0100 |
| Last post | 2015-11-24 00:10 +0100 |
| Articles | 2 — 2 participants |
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[PATCH] Documentation/memory-barriers.txt: fix ACCESS_ONCE thinko Chris Metcalf <cmetcalf@ezchip.com> - 2015-11-23 23:10 +0100
Re: [PATCH] Documentation/memory-barriers.txt: fix ACCESS_ONCE thinko "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2015-11-24 00:10 +0100
| From | Chris Metcalf <cmetcalf@ezchip.com> |
|---|---|
| Date | 2015-11-23 23:10 +0100 |
| Subject | [PATCH] Documentation/memory-barriers.txt: fix ACCESS_ONCE thinko |
| Message-ID | <qy7t7-7OH-9@gated-at.bofh.it> |
In commit 2ecf810121c7 ("Documentation/memory-barriers.txt: Add
needed ACCESS_ONCE() calls to memory-barriers.txt") the statement
"Q = P" was converted to "ACCESS_ONCE(Q) = P". This should have
been "Q = ACCESS_ONCE(P)". It later became "WRITE_ONCE(Q, P)".
This doesn't match the following text, which is "Q = LOAD P".
Change the statement to be "Q = READ_ONCE(P)".
Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
---
Documentation/memory-barriers.txt | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index aef9487303d0..85304ebd187c 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -194,7 +194,7 @@ There are some minimal guarantees that may be expected of a CPU:
(*) On any given CPU, dependent memory accesses will be issued in order, with
respect to itself. This means that for:
- WRITE_ONCE(Q, P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
+ Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
the CPU will issue the following memory operations:
@@ -202,9 +202,9 @@ There are some minimal guarantees that may be expected of a CPU:
and always in that order. On most systems, smp_read_barrier_depends()
does nothing, but it is required for DEC Alpha. The READ_ONCE()
- and WRITE_ONCE() are required to prevent compiler mischief. Please
- note that you should normally use something like rcu_dereference()
- instead of open-coding smp_read_barrier_depends().
+ is required to prevent compiler mischief. Please note that you
+ should normally use something like rcu_dereference() instead of
+ open-coding smp_read_barrier_depends().
(*) Overlapping loads and stores within a particular CPU will appear to be
ordered within that CPU. This means that for:
--
2.1.2
--
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| From | "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> |
|---|---|
| Date | 2015-11-24 00:10 +0100 |
| Message-ID | <qy8pc-8rU-17@gated-at.bofh.it> |
| In reply to | #1275917 |
On Mon, Nov 23, 2015 at 05:04:17PM -0500, Chris Metcalf wrote:
> In commit 2ecf810121c7 ("Documentation/memory-barriers.txt: Add
> needed ACCESS_ONCE() calls to memory-barriers.txt") the statement
> "Q = P" was converted to "ACCESS_ONCE(Q) = P". This should have
> been "Q = ACCESS_ONCE(P)". It later became "WRITE_ONCE(Q, P)".
> This doesn't match the following text, which is "Q = LOAD P".
> Change the statement to be "Q = READ_ONCE(P)".
>
> Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
Good eyes! Queued for v4.5.
Thanx, Paul
> ---
> Documentation/memory-barriers.txt | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
> index aef9487303d0..85304ebd187c 100644
> --- a/Documentation/memory-barriers.txt
> +++ b/Documentation/memory-barriers.txt
> @@ -194,7 +194,7 @@ There are some minimal guarantees that may be expected of a CPU:
> (*) On any given CPU, dependent memory accesses will be issued in order, with
> respect to itself. This means that for:
>
> - WRITE_ONCE(Q, P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
> + Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
>
> the CPU will issue the following memory operations:
>
> @@ -202,9 +202,9 @@ There are some minimal guarantees that may be expected of a CPU:
>
> and always in that order. On most systems, smp_read_barrier_depends()
> does nothing, but it is required for DEC Alpha. The READ_ONCE()
> - and WRITE_ONCE() are required to prevent compiler mischief. Please
> - note that you should normally use something like rcu_dereference()
> - instead of open-coding smp_read_barrier_depends().
> + is required to prevent compiler mischief. Please note that you
> + should normally use something like rcu_dereference() instead of
> + open-coding smp_read_barrier_depends().
>
> (*) Overlapping loads and stores within a particular CPU will appear to be
> ordered within that CPU. This means that for:
> --
> 2.1.2
>
--
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