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[PATCH v2] clk: si5351: Add PLL soft reset

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  [PATCH v2] clk: si5351: Add PLL soft reset Jacob Siverskog <jacob@teenage.engineering> - 2015-11-20 18:30 +0100

#1274306 — [PATCH v2] clk: si5351: Add PLL soft reset

Hi!
A representative from SiLabs writes: "All the currently published versions
of the Si5351 (v1.0) and AN619 (v0.6) do not include the “Si5351A/C only”
disclaimer. Based on this and our current understanding, I see no issue
performing a PLLB reset for ‘B’ type devices.". Hence, it should not be
any issues always performing the PLL reset.


Changes in v2:
- Output disabling and power down removed in order to prevent
  breaking systems requiring always-enabled clocks
- Cosmetic changes

     Jacob

Jacob Siverskog (1):
  clk: si5351: Add PLL soft reset

 drivers/clk/clk-si5351.c | 6 ++++++
 1 file changed, 6 insertions(+)

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2.6.3
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