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[PATCH 0/4] irqchip/gic: Deal with the active state across kexec and suspend/resume

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  [PATCH 0/4] irqchip/gic: Deal with the active state across kexec and suspend/resume Marc Zyngier <marc.zyngier@arm.com> - 2015-11-16 20:20 +0100
    [PATCH 1/4] arm: kexec: Deactivate in-flight interrupts Marc Zyngier <marc.zyngier@arm.com> - 2015-11-16 20:20 +0100

#1270499 — [PATCH 0/4] irqchip/gic: Deal with the active state across kexec and suspend/resume

Now that the kernel uses EOImode==1 for the GIC, this uncovers a
number of cases where the active state is not correctly handled:

- When doing kexec, we directly call the irq_eoi() method, which may
  violate ordering constraints, or leave interrupts active.
- When booting, we don't reset the active state, trusting whatever was
  there before.
- When doing suspend/resume, we're not saving/restoring the active
  state, which could result in lost interrupts if VMs were running at
  this precise moment.

This has also uncovered a small bug in the way we restore enabled
interrupts (which could result in a fix to stable).

These patches are on top of v4.4-rc1.

Marc Zyngier (4):
  arm: kexec: Deactivate in-flight interrupts
  irqchip/gic: Make sure all interrupts are deactivated at boot
  irqchip/gic: Clear enable bits before restoring them
  irqchip/gic: Add save/restore of the active state

 arch/arm/kernel/machine_kexec.c  | 11 ++++++++++-
 drivers/irqchip/irq-gic-common.c | 13 +++++++++----
 drivers/irqchip/irq-gic.c        | 38 ++++++++++++++++++++++++++++++++++++--
 3 files changed, 55 insertions(+), 7 deletions(-)

-- 
2.1.4

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#1270502 — [PATCH 1/4] arm: kexec: Deactivate in-flight interrupts

machine_kexec_mask_interrupts iterates over the system interrupts
and tries to mask all interrupts, including those that are currently
being handled.

The current method includes finding out if an interrupt is in progress,
and call the EOI method if that's the case. This methods has a few
issues when used with the GIC:

- In a hypothetical GIC centric world where we can handle
  interrupts at different priorities, nothing guarantees that
  we're going to EOI the interrupts in the mandated reverse order
  we have taken them.

- With the split EOI/Deactivate mode the GIC runs in when using
  virtualization, an interrupt can be EOIed, and still be active.
  The current code would not recognize that state (the interrupt
  is not flagged as being in progress from a host PoV).

A sensible way of avoiding these issues is to forcefully deactivate
the interrupt at the distributor level, and to only use EOI if
the deactivation has failed (which probably means that the irqchip
is not a GIC).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 arch/arm/kernel/machine_kexec.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 8bf3b7c..66662e6 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -8,6 +8,7 @@
 #include <linux/reboot.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/interrupt.h>
 #include <linux/memblock.h>
 #include <asm/pgtable.h>
 #include <linux/of_fdt.h>
@@ -98,12 +99,20 @@ static void machine_kexec_mask_interrupts(void)
 
 	for_each_irq_desc(i, desc) {
 		struct irq_chip *chip;
+		int ret;
 
 		chip = irq_desc_get_chip(desc);
 		if (!chip)
 			continue;
 
-		if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data))
+		/*
+		 * First try to remove the active state. If this
+		 * fails, try to EOI the interrupt.
+		 */
+		ret = irq_set_irqchip_state(i, IRQCHIP_STATE_ACTIVE, false);
+
+		if (ret && irqd_irq_inprogress(&desc->irq_data) &&
+		    chip->irq_eoi)
 			chip->irq_eoi(&desc->irq_data);
 
 		if (chip->irq_mask)
-- 
2.1.4

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