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Re: [PATCH 0/9] rtc-2123: access the clock offset feature

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  Re: [PATCH 0/9] rtc-2123: access the clock offset feature Joshua Clayton <stillcompiling@gmail.com> - 2015-11-17 16:40 +0100
    Re: [PATCH 0/9] rtc-2123: access the clock offset feature Alexandre Belloni <alexandre.belloni@free-electrons.com> - 2015-11-17 17:30 +0100
      Re: [PATCH 0/9] rtc-2123: access the clock offset feature Joshua Clayton <stillcompiling@gmail.com> - 2015-11-19 01:30 +0100

#1271344 — Re: [PATCH 0/9] rtc-2123: access the clock offset feature

On Wednesday, November 04, 2015 07:36:31 AM Joshua Clayton wrote:
> Greetings,
> This series was prompted by a need to adjust the clock rate of the rtc
> The existing code performs a soft reset during probe, which wipes out
> several registers including the offset register, which performs adjustments
> to the clock rate.
> 
> The first several patches are cleanup, with patch 5 and 6 avoiding the reset,
> and patch 9 adding a nice sysfs interface to the clock offset.
> 
> I know that this is not the only rtc to provide a programmable clock offset
> I wonder if this interface would make a good addition to the rtc api?
> 
> The rtc chips I have seen list their clock adjustments in parts per million.
> I went with parts per billion, since the ppm listed was listed with a
> fractional component.
> 
> Joshua Clayton (9):
>   rtc-pcf2123: Document all registers and useful bits
>   rtc-pcf2123: clean up reads from the chip
>   rtc-pcf2123: clean up writes to the rtc chip
>   rtc-pcf2123: replace magic numbers with defines
>   rtc-pcf2123: put the chip reset into a function
>   rtc-pcf2123: avoid resetting the clock if possible
>   rtc-pcf2123: allow sysfs to accept hexidecimal
>   rtc-pcf2123: use sysfs groups
>   rtc-pcf2123: adjust the clock rate via sysfs
> 
>  drivers/rtc/rtc-pcf2123.c | 391 ++++++++++++++++++++++++++++++----------------
>  1 file changed, 257 insertions(+), 134 deletions(-)
> 
> 
Any comments on this series?
I realize now that I submitted it during the merge window, so it may have been overlooked.

-- 
~Joshua Clayton
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#1271384

On 17/11/2015 at 07:30:48 -0800, Joshua Clayton wrote :
> On Wednesday, November 04, 2015 07:36:31 AM Joshua Clayton wrote:
> > Greetings,
> > This series was prompted by a need to adjust the clock rate of the rtc
> > The existing code performs a soft reset during probe, which wipes out
> > several registers including the offset register, which performs adjustments
> > to the clock rate.
> > 
> > The first several patches are cleanup, with patch 5 and 6 avoiding the reset,
> > and patch 9 adding a nice sysfs interface to the clock offset.
> > 
> > I know that this is not the only rtc to provide a programmable clock offset
> > I wonder if this interface would make a good addition to the rtc api?
> > 
> > The rtc chips I have seen list their clock adjustments in parts per million.
> > I went with parts per billion, since the ppm listed was listed with a
> > fractional component.
> > 
> > Joshua Clayton (9):
> >   rtc-pcf2123: Document all registers and useful bits
> >   rtc-pcf2123: clean up reads from the chip
> >   rtc-pcf2123: clean up writes to the rtc chip
> >   rtc-pcf2123: replace magic numbers with defines
> >   rtc-pcf2123: put the chip reset into a function
> >   rtc-pcf2123: avoid resetting the clock if possible
> >   rtc-pcf2123: allow sysfs to accept hexidecimal
> >   rtc-pcf2123: use sysfs groups
> >   rtc-pcf2123: adjust the clock rate via sysfs
> > 
> >  drivers/rtc/rtc-pcf2123.c | 391 ++++++++++++++++++++++++++++++----------------
> >  1 file changed, 257 insertions(+), 134 deletions(-)
> > 
> > 
> Any comments on this series?
> I realize now that I submitted it during the merge window, so it may have been overlooked.
> 

I will have a few comments but I didn't review everything thoroughly
yet. As you mentioned, you submitted during the merge window so this was
not going to be in 4.4 anyway.

-- 
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#1272711

On Tuesday, November 17, 2015 05:25:30 PM Alexandre Belloni wrote:
> On 17/11/2015 at 07:30:48 -0800, Joshua Clayton wrote :
> > On Wednesday, November 04, 2015 07:36:31 AM Joshua Clayton wrote:
> > Any comments on this series?
> > I realize now that I submitted it during the merge window, so it may have been overlooked.
> > 
> 
> I will have a few comments but I didn't review everything thoroughly
> yet. As you mentioned, you submitted during the merge window so this was
> not going to be in 4.4 anyway.
> 
> 
Thanks!
I can relax since I know it is on your radar.
I have responded my self to a couple of fat fingers in the commit messages.
I am also in the process of testing the actual effects of the feature.

One thing I'm not sure I have adequately described (and didn't really
understand until I started testing) is that a positive value in the adjust
register increases the average value of a second, so it makes the clock
slower, while a negative adjustment makes it faster.

This was counterintuitive to me.
Not having deeply examined other rtc's with similar capabilities, I can't
say whether this is the norm.

-- 
~Joshua Clayton
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