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[PATCH] usb: dwc2: hcd: fix periodic transfer schedule sequence

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  [PATCH] usb: dwc2: hcd: fix periodic transfer schedule sequence Yunzhi Li <lyz@rock-chips.com> - 2015-11-16 16:30 +0100
    Re: [PATCH] usb: dwc2: hcd: fix periodic transfer schedule sequence Doug Anderson <dianders@chromium.org> - 2015-11-16 19:30 +0100
    Re: [PATCH] usb: dwc2: hcd: fix periodic transfer schedule sequence Caesar Wang <caesar.upstream@gmail.com> - 2015-11-16 23:50 +0100

#1270285 — [PATCH] usb: dwc2: hcd: fix periodic transfer schedule sequence

When checking dwc2 host channel interrupts, handle qh in
periodic_sched_queued list at first, then we could make sure CSPLIT
packets scheduled in the same order as SSPLIT packets.

Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
---
 drivers/usb/dwc2/hcd_intr.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index bda0b21..e8e8970 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -2115,6 +2115,8 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
 {
 	u32 haint;
 	int i;
+	int hc_num;
+	struct dwc2_qh *qh, *qh_tmp;
 
 	haint = dwc2_readl(hsotg->regs + HAINT);
 	if (dbg_perio()) {
@@ -2123,6 +2125,26 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
 		dev_vdbg(hsotg->dev, "HAINT=%08x\n", haint);
 	}
 
+	/*
+	 * According to USB 2.0 spec section 11.18.8, a host must
+	 * issue complete-split transactions in a microframe for a
+	 * set of full-/low-speed endpoints in the same relative
+	 * order as the start-splits were issued in a microframe for.
+	 * So here we should at first picking up host channels
+	 * from periodic_sched_queued list and checking if there is
+	 * any start-split have already finished then schedule
+	 * complete-split in the same order.
+	 */
+	list_for_each_entry_safe(qh, qh_tmp,
+				 &hsotg->periodic_sched_queued,
+				 qh_list_entry) {
+		hc_num = qh->channel->hc_num;
+		if (haint & (1 << hc_num)) {
+			dwc2_hc_n_intr(hsotg, hc_num);
+			haint &= ~(1 << hc_num);
+		}
+	}
+
 	for (i = 0; i < hsotg->core_params->host_channels; i++) {
 		if (haint & (1 << i))
 			dwc2_hc_n_intr(hsotg, i);
-- 
1.9.1


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#1270451

Yunzhi

On Mon, Nov 16, 2015 at 7:25 AM, Yunzhi Li <lyz@rock-chips.com> wrote:
> When checking dwc2 host channel interrupts, handle qh in
> periodic_sched_queued list at first, then we could make sure CSPLIT
> packets scheduled in the same order as SSPLIT packets.
>
> Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
> ---
>  drivers/usb/dwc2/hcd_intr.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)

This seems like a very reasonable fix to me.  I also bought the same
keyboard you were debugging with (The Das Keyboard 4 Ultimate Clicky)
and confirmed that problems are fixed by this patch on the
rk3288-based veyron-jerry sitting on my desk.


Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
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#1270669

Hi,

在 2015年11月16日 23:25, Yunzhi Li 写道:
> When checking dwc2 host channel interrupts, handle qh in
> periodic_sched_queued list at first, then we could make sure CSPLIT
> packets scheduled in the same order as SSPLIT packets.
>
> Signed-off-by: Yunzhi Li <lyz@rock-chips.com>

This patch can fix some usb issues on my hand machine.

Says:
(1) The usb hub can't normal work (KB, mouse ...) when SB 
headset/Speaker is connected to USB2.0 travel HUB.
(2)  The music have the wonder noise when we are use some usb speak.
......

So, you can free add my test tag:

Tested-by: Caesar Wang <wxt@rock-chips.com>

> ---
>   drivers/usb/dwc2/hcd_intr.c | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
>
> diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
> index bda0b21..e8e8970 100644
> --- a/drivers/usb/dwc2/hcd_intr.c
> +++ b/drivers/usb/dwc2/hcd_intr.c
> @@ -2115,6 +2115,8 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
>   {
>   	u32 haint;
>   	int i;
> +	int hc_num;
> +	struct dwc2_qh *qh, *qh_tmp;
>   
>   	haint = dwc2_readl(hsotg->regs + HAINT);
>   	if (dbg_perio()) {
> @@ -2123,6 +2125,26 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
>   		dev_vdbg(hsotg->dev, "HAINT=%08x\n", haint);
>   	}
>   
> +	/*
> +	 * According to USB 2.0 spec section 11.18.8, a host must
> +	 * issue complete-split transactions in a microframe for a
> +	 * set of full-/low-speed endpoints in the same relative
> +	 * order as the start-splits were issued in a microframe for.
> +	 * So here we should at first picking up host channels
> +	 * from periodic_sched_queued list and checking if there is
> +	 * any start-split have already finished then schedule
> +	 * complete-split in the same order.
> +	 */
> +	list_for_each_entry_safe(qh, qh_tmp,
> +				 &hsotg->periodic_sched_queued,
> +				 qh_list_entry) {
> +		hc_num = qh->channel->hc_num;
> +		if (haint & (1 << hc_num)) {
> +			dwc2_hc_n_intr(hsotg, hc_num);
> +			haint &= ~(1 << hc_num);
> +		}
> +	}
> +
>   	for (i = 0; i < hsotg->core_params->host_channels; i++) {
>   		if (haint & (1 << i))
>   			dwc2_hc_n_intr(hsotg, i);
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