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[PATCH 3.2 37/60] ASoC: wm8904: Correct number of EQ registers

Started byBen Hutchings <ben@decadent.org.uk>
First post2015-11-15 03:10 +0100
Last post2015-11-15 03:10 +0100
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  [PATCH 3.2 37/60] ASoC: wm8904: Correct number of EQ registers Ben Hutchings <ben@decadent.org.uk> - 2015-11-15 03:10 +0100

#1269567 — [PATCH 3.2 37/60] ASoC: wm8904: Correct number of EQ registers

FromBen Hutchings <ben@decadent.org.uk>
Date2015-11-15 03:10 +0100
Subject[PATCH 3.2 37/60] ASoC: wm8904: Correct number of EQ registers
Message-ID<quUVs-3GF-21@gated-at.bofh.it>
3.2.73-rc1 review patch.  If anyone has any objections, please let me know.

------------------

From: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>

commit 97aff2c03a1e4d343266adadb52313613efb027f upstream.

There are 24 EQ registers not 25, I suspect this bug came about because
the registers start at EQ1 not zero. The bug is relatively harmless as
the extra register written is an unused one.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
---
 include/sound/wm8904.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/include/sound/wm8904.h
+++ b/include/sound/wm8904.h
@@ -119,7 +119,7 @@
 #define WM8904_MIC_REGS  2
 #define WM8904_GPIO_REGS 4
 #define WM8904_DRC_REGS  4
-#define WM8904_EQ_REGS   25
+#define WM8904_EQ_REGS   24
 
 /**
  * DRC configurations are specified with a label and a set of register

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