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[PATCH 1/2] x86/intel_rdt,intel_cqm: Remove build dependency of RDT code on CQM code.

Started byDavid Carrillo-Cisneros <davidcc@google.com>
First post2015-11-05 03:30 +0100
Last post2015-11-05 03:30 +0100
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  [PATCH 1/2] x86/intel_rdt,intel_cqm: Remove build dependency of RDT code on CQM code. David Carrillo-Cisneros <davidcc@google.com> - 2015-11-05 03:30 +0100
    [PATCH 2/2] x86/intel_rdt: Fix bug in initialization, locks and write cbm mask. David Carrillo-Cisneros <davidcc@google.com> - 2015-11-05 03:30 +0100

#1262828 — [PATCH 1/2] x86/intel_rdt,intel_cqm: Remove build dependency of RDT code on CQM code.

FromDavid Carrillo-Cisneros <davidcc@google.com>
Date2015-11-05 03:30 +0100
Subject[PATCH 1/2] x86/intel_rdt,intel_cqm: Remove build dependency of RDT code on CQM code.
Message-ID<qritj-ro-9@gated-at.bofh.it>
Minor code move to remove build dependency of RDT code on
perf_event_intel_cqm.c .

Signed-off-by: David Carrillo-Cisneros <davidcc@google.com>
---
 arch/x86/include/asm/pqr_common.h          |  3 +++
 arch/x86/kernel/cpu/Makefile               |  6 +++++-
 arch/x86/kernel/cpu/perf_event_intel_cqm.c |  8 --------
 arch/x86/kernel/cpu/pqr_common.c           | 10 ++++++++++
 4 files changed, 18 insertions(+), 9 deletions(-)
 create mode 100644 arch/x86/kernel/cpu/pqr_common.c

diff --git a/arch/x86/include/asm/pqr_common.h b/arch/x86/include/asm/pqr_common.h
index 11e985c..228e943 100644
--- a/arch/x86/include/asm/pqr_common.h
+++ b/arch/x86/include/asm/pqr_common.h
@@ -1,6 +1,9 @@
 #ifndef _X86_RDT_H_
 #define _X86_RDT_H_
 
+#include <linux/types.h>
+#include <asm/percpu.h>
+
 #define MSR_IA32_PQR_ASSOC	0x0c8f
 
 /**
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index b3292a4..5eb0f6e 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -39,7 +39,8 @@ obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd_iommu.o
 endif
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_p6.o perf_event_knc.o perf_event_p4.o
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o
-obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_rapl.o perf_event_intel_cqm.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_rapl.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= pqr_common.o perf_event_intel_cqm.o
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_pt.o perf_event_intel_bts.o
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_cstate.o
 
@@ -49,6 +50,9 @@ obj-$(CONFIG_PERF_EVENTS_INTEL_UNCORE)	+= perf_event_intel_uncore.o \
 					   perf_event_intel_uncore_nhmex.o
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_msr.o
 obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_msr.o
+
+else
+obj-$(CONFIG_INTEL_RDT)			+= pqr_common.o
 endif
 
 obj-$(CONFIG_INTEL_RDT)			+= intel_rdt.o
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
index 04a696f..eee960d 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
@@ -17,14 +17,6 @@ static u32 cqm_max_rmid = -1;
 static unsigned int cqm_l3_scale; /* supposedly cacheline size */
 
 /*
- * The cached intel_pqr_state is strictly per CPU and can never be
- * updated from a remote CPU. Both functions which modify the state
- * (intel_cqm_event_start and intel_cqm_event_stop) are called with
- * interrupts disabled, which is sufficient for the protection.
- */
-DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);
-
-/*
  * Protects cache_cgroups and cqm_rmid_free_lru and cqm_rmid_limbo_lru.
  * Also protects event->hw.cqm_rmid
  *
diff --git a/arch/x86/kernel/cpu/pqr_common.c b/arch/x86/kernel/cpu/pqr_common.c
new file mode 100644
index 0000000..abcb432
--- /dev/null
+++ b/arch/x86/kernel/cpu/pqr_common.c
@@ -0,0 +1,10 @@
+#include <asm/pqr_common.h>
+
+/*
+ * The cached intel_pqr_state is strictly per CPU and can never be
+ * updated from a remote CPU. Both functions which modify the state
+ * (intel_cqm_event_start and intel_cqm_event_stop) are called with
+ * interrupts disabled, which is sufficient for the protection.
+ */
+DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);
+
-- 
2.6.0.rc2.230.g3dd15c0

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#1262830 — [PATCH 2/2] x86/intel_rdt: Fix bug in initialization, locks and write cbm mask.

FromDavid Carrillo-Cisneros <davidcc@google.com>
Date2015-11-05 03:30 +0100
Subject[PATCH 2/2] x86/intel_rdt: Fix bug in initialization, locks and write cbm mask.
Message-ID<qritj-ro-13@gated-at.bofh.it>
In reply to#1262828
Fix bugs in patch series "x86:Intel Cache Allocation Technology Support"
patches by Fenghua Yu. Changes are:
  1) Instruct task_css_check not to print a warning for
    unnecesary lockdeps when calling from __rdt_intel_sched_in
    since all callers are already synchronized by task_rq_lock().
  2) Add missing mutex_locks surrounding accesses to clos_cbm_table.
  3) Properly initialize online cpus in intel_rdt_late_init by using
    intel_rdt_cpu_start() instead of rdt_cpumask_update().
  4) Make cbm_validate_rdt_cgroup to actually use the children's mask
    when validating children's masks (as it should).

Signed-off-by: David Carrillo-Cisneros <davidcc@google.com>
---
 arch/x86/include/asm/intel_rdt.h | 12 +++++++++---
 arch/x86/kernel/cpu/intel_rdt.c  | 24 ++++++++++++++++++------
 2 files changed, 27 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h
index fbe1e00..f487a93 100644
--- a/arch/x86/include/asm/intel_rdt.h
+++ b/arch/x86/include/asm/intel_rdt.h
@@ -37,11 +37,17 @@ static inline struct intel_rdt *parent_rdt(struct intel_rdt *ir)
 }
 
 /*
- * Return rdt group to which this task belongs.
+ * Return rdt group to which this task belongs without checking for lockdep.
  */
-static inline struct intel_rdt *task_rdt(struct task_struct *task)
+static inline struct intel_rdt *task_rdt_nocheck(struct task_struct *task)
 {
-	return css_rdt(task_css(task, intel_rdt_cgrp_id));
+	/*
+	 * The checks for lockdep performed by task_subsys_state are not
+	 * necessary when callers are properly synchronized by other locks.
+	 * If the caller for this function is not properly synchronized
+	 * use task_css instead.
+	 */
+	return css_rdt(task_css_check(task, intel_rdt_cgrp_id, true));
 }
 
 /*
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
index cb4d2ef..d5fa76f 100644
--- a/arch/x86/kernel/cpu/intel_rdt.c
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -115,7 +115,13 @@ static inline bool cache_alloc_supported(struct cpuinfo_x86 *c)
 void __intel_rdt_sched_in(void *dummy)
 {
 	struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
-	struct intel_rdt *ir = task_rdt(current);
+
+	/*
+	 * All callers are synchronized by task_rq_lock(); we do not use RCU
+	 * which is pointless here. Thus, we call task_rdt_nocheck that avoids
+	 * the lockdep checks.
+	 */
+	struct intel_rdt *ir = task_rdt_nocheck(current);
 
 	if (ir->closid == state->closid)
 		return;
@@ -403,7 +409,9 @@ static int intel_cache_alloc_cbm_read(struct seq_file *m, void *v)
 	struct intel_rdt *ir = css_rdt(seq_css(m));
 	unsigned long l3_cbm = 0;
 
+	mutex_lock(&rdt_group_mutex);
 	clos_cbm_table_read(ir->closid, &l3_cbm);
+	mutex_unlock(&rdt_group_mutex);
 	seq_printf(m, "%08lx\n", l3_cbm);
 
 	return 0;
@@ -431,7 +439,7 @@ static int cbm_validate_rdt_cgroup(struct intel_rdt *ir, unsigned long cbmvalue)
 	rcu_read_lock();
 	rdt_for_each_child(css, ir) {
 		c = css_rdt(css);
-		clos_cbm_table_read(par->closid, &cbm_tmp);
+		clos_cbm_table_read(c->closid, &cbm_tmp);
 		if (!bitmap_subset(&cbm_tmp, &cbmvalue, MAX_CBM_LENGTH)) {
 			rcu_read_unlock();
 			err = -EINVAL;
@@ -504,7 +512,6 @@ static int intel_cache_alloc_cbm_write(struct cgroup_subsys_state *css,
 	closcbm_map_dump();
 out:
 	mutex_unlock(&rdt_group_mutex);
-
 	return err;
 }
 
@@ -513,12 +520,16 @@ static void rdt_cgroup_init(void)
 	int max_cbm_len = boot_cpu_data.x86_cache_max_cbm_len;
 	u32 closid;
 
+	mutex_lock(&rdt_group_mutex);
+
 	closid_alloc(&closid);
 
 	WARN_ON(closid != 0);
 
 	rdt_root_group.closid = closid;
 	clos_cbm_table_update(closid, (1ULL << max_cbm_len) - 1);
+
+	mutex_unlock(&rdt_group_mutex);
 }
 
 static int __init intel_rdt_late_init(void)
@@ -552,15 +563,16 @@ static int __init intel_rdt_late_init(void)
 	cpu_notifier_register_begin();
 
 	for_each_online_cpu(i)
-		rdt_cpumask_update(i);
-
+		intel_rdt_cpu_start(i);
 	__hotcpu_notifier(intel_rdt_cpu_notifier, 0);
 
 	cpu_notifier_register_done();
+
 	rdt_cgroup_init();
 
 	static_key_slow_inc(&rdt_enable_key);
-	pr_info("Intel cache allocation enabled\n");
+	pr_info("Intel cache allocation enabled\n"
+		"max_closid:%u, max_cbm_len:%u\n", maxid, max_cbm_len);
 out_err:
 
 	return err;
-- 
2.6.0.rc2.230.g3dd15c0

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