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[PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

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  [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs Caesar Wang <wxt@rock-chips.com> - 2015-11-05 06:20 +0100
    [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement Caesar Wang <wxt@rock-chips.com> - 2015-11-05 06:20 +0100
      Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value  increment or decrement Eduardo Valentin <edubezval@gmail.com> - 2015-11-06 20:20 +0100
        Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value  increment or decrement Caesar Wang <caesar.upstream@gmail.com> - 2015-11-07 16:40 +0100
          Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value  increment or decrement Caesar Wang <caesar.upstream@gmail.com> - 2015-11-09 04:30 +0100
    Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and  support RK3368 SoCs Eduardo Valentin <edubezval@gmail.com> - 2015-11-06 19:50 +0100
      Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs Heiko Stuebner <heiko@sntech.de> - 2015-11-06 20:10 +0100
        Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and  support RK3368 SoCs Eduardo Valentin <edubezval@gmail.com> - 2015-11-06 20:20 +0100
        Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and  support RK3368 SoCs Caesar Wang <caesar.upstream@gmail.com> - 2015-11-07 17:00 +0100
          Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs Heiko Stuebner <heiko@sntech.de> - 2015-11-08 00:20 +0100
            Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and  support RK3368 SoCs Caesar Wang <caesar.upstream@gmail.com> - 2015-11-08 10:40 +0100
      Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and  support RK3368 SoCs Caesar Wang <caesar.upstream@gmail.com> - 2015-11-07 16:50 +0100

#1262924 — [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

This series patchs are working for RK3368 on Rockchip platform.

@Heiko,
    The PATCH [5/6] is working based on big/littel cluster cpufreq
    added. Anyway, the PATCH [5/6] also work for next kernel.

@Eduardo,
This patchset are based on linus master branch.
Note: Need add the following thermal patchs for thermal driver before apply
this series patchs.

1) thermal: rockchip: fix handling of invalid readings
(https://patchwork.kernel.org/patch/6973101/)

2) thermal: rockhip: fix setting thermal shutdown polarity
(https://patchwork.kernel.org/patch/6973131/)

3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
(https://patchwork.kernel.org/patch/7472021/)

4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
(https://patchwork.kernel.org/patch/7472051/)

I'm glad these patchs have merged in thermal-soc git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git

the git log oneline my local branch as follows:
3e2c90b arm64: dts: Enable the Thermal on R88 board
a33ee26 arm64: dts: Add main Thermal info to rk3368.dtsi
fc051c9 arm64: dts: Add the thermal data found on RK3368
d6e7126 thermal: rockchip: Support the RK3368 SoCs in thermal drivers
d16eb7f thermal: rockchip: Add the flag for adc value increment or decrement
acc3ead thermal: rockchip: improve the conversion function
f295e0b thermal: rockchip: trivial: fix typo in commit
2291fc3 thermal: rockchip: better to compatible the driver for different SoCs
e18e646 dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible

29eb0c7 thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
cf2100b dt-bindings: rockchip-thermal: Add the pinctrl states in this document
38e287b0 thermal: rockhip: fix setting thermal shutdown polarity
ddee4a2 thermal: rockchip: fix handling of invalid readings
8a28d67 Merge tag 'powerpc-4.3-6' of
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
977bf06 powerpc/dma: dma_set_coherent_mask() should not be GPL only
a22c4d7 block: re-add discard_granularity and alignment checks
23d8827 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
3d0aa36 Merge branch 'for-linus' of git://git.kernel.dk/linux-block
dc5bc3f Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
9e17f90 Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux
174fd8d blkcg: fix incorrect read/write sync/async stat accounting
858e904 Merge tag 'iommu-fixes-v4.3-rc7' of
......

----
This series are tested on RK3368 board.

while true;do ls >/dev/null; done&

while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp; sleep .5; done &

You can get the temperature form sensors.
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:32500


Changes in v2:
- As Eduardo comments on patch v1, split in smaller changes.
- make the conversion table in as a parameter both code_to_temp
  and temp_to_code function.
Series-changes: 1
- As Dmitry comment, make the conversion table in as a parameter.
- remove some unused, completed on other patchs.
- fix a copy wrong name.
Series-changes: 1
- support the opt gpio pinctrl state

Changes in v1:
- %s/thermal/rockchip-thermal in subject.
- add a new patch for thermal driver to support more SoCs.

Caesar Wang (9):
  dt-bindings: rockchip-thermal: Support the RK3368 SoCs compatible
  thermal: rockchip: better to compatible the driver for different SoCs
  thermal: rockchip: trivial: fix typo in commit
  thermal: rockchip: improve the conversion function
  thermal: rockchip: Add the flag for adc value increment or decrement
  thermal: rockchip: Support the RK3368 SoCs in thermal drivers
  arm64: dts: Add the thermal data found on RK3368
  arm64: dts: Add main Thermal info to rk3368.dtsi
  arm64: dts: Enable the Thermal on R88 board

 .../bindings/thermal/rockchip-thermal.txt          |   4 +-
 arch/arm64/boot/dts/rockchip/rk3368-r88.dts        |   6 +
 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi   | 112 ++++++++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  36 +++
 drivers/thermal/rockchip_thermal.c                 | 312 +++++++++++++++------
 5 files changed, 389 insertions(+), 81 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

-- 
1.9.1

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#1262925 — [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.

Moment, we can add the flag to be better support the *code_to_temp*
for differenr SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None
Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
 1 file changed, 51 insertions(+), 13 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e828f18..9df027f 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -53,6 +53,16 @@ enum sensor_id {
 };
 
 /**
+* The conversion table has the adc value and temperature.
+* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
+* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
+*/
+enum adc_flag {
+	ADC_DECREMENT = 0,
+	ADC_INCREMENT,
+};
+
+/**
  * The max sensors is two in rockchip SoCs.
  * Two sensors: CPU and GPU sensor.
  */
@@ -66,6 +76,9 @@ struct chip_tsadc_table {
 
 	/* that analogic mask data */
 	unsigned long data_mask;
+
+	/* adc value is increment or decrement */
+	unsigned int flag;
 };
 
 struct rockchip_tsadc_chip {
@@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 
 	WARN_ON(table.length < 2);
 
-	code &= table.data_mask;
-	if (code < table.id[high].code)
+	switch (table.flag) {
+	case ADC_DECREMENT:
+		code &= table.data_mask;
+		if (code < table.id[high].code)
 		return -EAGAIN;		/* Incorrect reading */
 
-	while (low <= high) {
-		if (code >= table.id[mid].code &&
-		    code < table.id[mid - 1].code)
-			break;
-		else if (code < table.id[mid].code)
-			low = mid + 1;
-		else
-			high = mid - 1;
-		mid = (low + high) / 2;
+		while (low <= high) {
+			if (code >= table.id[mid].code &&
+			    code < table.id[mid - 1].code)
+				break;
+			else if (code < table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	case ADC_INCREMENT:
+		code &= table.data_mask;
+		if (code < table.id[low].code)
+		return -EAGAIN;		/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table.id[mid - 1].code &&
+			    code < table.id[mid].code)
+				break;
+			else if (code > table.id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	default:
+		pr_err("Invalid the table conversion\n");
 	}
 
 	/*
@@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 	 * to produce less granular result.
 	 */
 	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
-	num *= table.id[mid - 1].code - code;
-	denom = table.id[mid - 1].code - table.id[mid].code;
+	num *= abs(table.id[mid - 1].code - code);
+	denom = abs(table.id[mid - 1].code - table.id[mid].code);
 	*temp = table.id[mid - 1].temp + (num / denom);
 
 	return 0;
@@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 		.id = v2_code_table,
 		.length = ARRAY_SIZE(v2_code_table),
 		.data_mask = TSADCV2_DATA_MASK,
+		.flag = ADC_DECREMENT,
 	},
 };
 
-- 
1.9.1

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#1264241 — Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
> The conversion table has the adc value and temperature.
> In fact, the adc value only has the increment or decrement mode in
> conversion table.
> 
> Moment, we can add the flag to be better support the *code_to_temp*
> for differenr SoCs.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v2: None
> Changes in v1: None
> 
>  drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
>  1 file changed, 51 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index e828f18..9df027f 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -53,6 +53,16 @@ enum sensor_id {
>  };
>  
>  /**
> +* The conversion table has the adc value and temperature.
> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
> +*/
> +enum adc_flag {
> +	ADC_DECREMENT = 0,
> +	ADC_INCREMENT,
> +};
> +
> +/**
>   * The max sensors is two in rockchip SoCs.
>   * Two sensors: CPU and GPU sensor.
>   */
> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>  
>  	/* that analogic mask data */
>  	unsigned long data_mask;
> +
> +	/* adc value is increment or decrement */
> +	unsigned int flag;


Maybe bool? And rename to something more meaningful?

Or do you plan to have more conditions to test in your flag?

>  };
>  
>  struct rockchip_tsadc_chip {
> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>  
>  	WARN_ON(table.length < 2);
>  
> -	code &= table.data_mask;
> -	if (code < table.id[high].code)
> +	switch (table.flag) {
> +	case ADC_DECREMENT:
> +		code &= table.data_mask;
> +		if (code < table.id[high].code)
>  		return -EAGAIN;		/* Incorrect reading */

Add an indentation.
>  
> -	while (low <= high) {
> -		if (code >= table.id[mid].code &&
> -		    code < table.id[mid - 1].code)
> -			break;
> -		else if (code < table.id[mid].code)
> -			low = mid + 1;
> -		else
> -			high = mid - 1;
> -		mid = (low + high) / 2;
> +		while (low <= high) {
> +			if (code >= table.id[mid].code &&
> +			    code < table.id[mid - 1].code)
> +				break;
> +			else if (code < table.id[mid].code)
> +				low = mid + 1;
> +			else
> +				high = mid - 1;
> +
> +			mid = (low + high) / 2;
> +		}
> +		break;
> +	case ADC_INCREMENT:
> +		code &= table.data_mask;
> +		if (code < table.id[low].code)
> +		return -EAGAIN;		/* Incorrect reading */
> +
add an indentation.

> +		while (low <= high) {
> +			if (code >= table.id[mid - 1].code &&
> +			    code < table.id[mid].code)
> +				break;
> +			else if (code > table.id[mid].code)
> +				low = mid + 1;
> +			else
> +				high = mid - 1;
> +
> +			mid = (low + high) / 2;
> +		}
> +		break;
> +	default:
> +		pr_err("Invalid the table conversion\n");
>  	}
>  
>  	/*
> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>  	 * to produce less granular result.
>  	 */
>  	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
> -	num *= table.id[mid - 1].code - code;
> -	denom = table.id[mid - 1].code - table.id[mid].code;
> +	num *= abs(table.id[mid - 1].code - code);
> +	denom = abs(table.id[mid - 1].code - table.id[mid].code);
>  	*temp = table.id[mid - 1].temp + (num / denom);
>  
>  	return 0;
> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>  		.id = v2_code_table,
>  		.length = ARRAY_SIZE(v2_code_table),
>  		.data_mask = TSADCV2_DATA_MASK,
> +		.flag = ADC_DECREMENT,
>  	},
>  };
>  
> -- 
> 1.9.1
> 
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#1264865 — Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

Hello Eduardo,

在 2015年11月07日 03:11, Eduardo Valentin 写道:
> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>> The conversion table has the adc value and temperature.
>> In fact, the adc value only has the increment or decrement mode in
>> conversion table.
>>
>> Moment, we can add the flag to be better support the *code_to_temp*
>> for differenr SoCs.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>> Changes in v2: None
>> Changes in v1: None
>>
>>   drivers/thermal/rockchip_thermal.c | 64 ++++++++++++++++++++++++++++++--------
>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index e828f18..9df027f 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -53,6 +53,16 @@ enum sensor_id {
>>   };
>>   
>>   /**
>> +* The conversion table has the adc value and temperature.
>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>> +*/
>> +enum adc_flag {
>> +	ADC_DECREMENT = 0,
>> +	ADC_INCREMENT,
>> +};
>> +
>> +/**
>>    * The max sensors is two in rockchip SoCs.
>>    * Two sensors: CPU and GPU sensor.
>>    */
>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>   
>>   	/* that analogic mask data */
>>   	unsigned long data_mask;
>> +
>> +	/* adc value is increment or decrement */
>> +	unsigned int flag;
>
> Maybe bool? And rename to something more meaningful?

Sure, that should be a bool type.
I guess the rename in sort_flag......(maybe will have a better name)


>
> Or do you plan to have more conditions to test in your flag?

Moment, the flag (increment or decrement) can support all the rockchip 
series SoCs have thermal function.

>>   };
>>   
>>   struct rockchip_tsadc_chip {
>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>>   
>>   	WARN_ON(table.length < 2);
>>   
>> -	code &= table.data_mask;
>> -	if (code < table.id[high].code)
>> +	switch (table.flag) {
>> +	case ADC_DECREMENT:
>> +		code &= table.data_mask;
>> +		if (code < table.id[high].code)
>>   		return -EAGAIN;		/* Incorrect reading */
> Add an indentation.

Thanks, will be fixed in next patch.


>>   
>> -	while (low <= high) {
>> -		if (code >= table.id[mid].code &&
>> -		    code < table.id[mid - 1].code)
>> -			break;
>> -		else if (code < table.id[mid].code)
>> -			low = mid + 1;
>> -		else
>> -			high = mid - 1;
>> -		mid = (low + high) / 2;
>> +		while (low <= high) {
>> +			if (code >= table.id[mid].code &&
>> +			    code < table.id[mid - 1].code)
>> +				break;
>> +			else if (code < table.id[mid].code)
>> +				low = mid + 1;
>> +			else
>> +				high = mid - 1;
>> +
>> +			mid = (low + high) / 2;
>> +		}
>> +		break;
>> +	case ADC_INCREMENT:
>> +		code &= table.data_mask;
>> +		if (code < table.id[low].code)
>> +		return -EAGAIN;		/* Incorrect reading */
>> +
> add an indentation.

Ditto.

Thanks,
Caesar
>
>> +		while (low <= high) {
>> +			if (code >= table.id[mid - 1].code &&
>> +			    code < table.id[mid].code)
>> +				break;
>> +			else if (code > table.id[mid].code)
>> +				low = mid + 1;
>> +			else
>> +				high = mid - 1;
>> +
>> +			mid = (low + high) / 2;
>> +		}
>> +		break;
>> +	default:
>> +		pr_err("Invalid the table conversion\n");
>>   	}
>>   
>>   	/*
>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>>   	 * to produce less granular result.
>>   	 */
>>   	num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>> -	num *= table.id[mid - 1].code - code;
>> -	denom = table.id[mid - 1].code - table.id[mid].code;
>> +	num *= abs(table.id[mid - 1].code - code);
>> +	denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>   	*temp = table.id[mid - 1].temp + (num / denom);
>>   
>>   	return 0;
>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
>>   		.id = v2_code_table,
>>   		.length = ARRAY_SIZE(v2_code_table),
>>   		.data_mask = TSADCV2_DATA_MASK,
>> +		.flag = ADC_DECREMENT,
>>   	},
>>   };
>>   
>> -- 
>> 1.9.1
>>
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#1265318 — Re: [PATCH v2 5/9] thermal: rockchip: Add the flag for adc value increment or decrement

在 2015年11月07日 23:38, Caesar Wang 写道:
> Hello Eduardo,
>
> 在 2015年11月07日 03:11, Eduardo Valentin 写道:
>> On Thu, Nov 05, 2015 at 01:18:01PM +0800, Caesar Wang wrote:
>>> The conversion table has the adc value and temperature.
>>> In fact, the adc value only has the increment or decrement mode in
>>> conversion table.
>>>
>>> Moment, we can add the flag to be better support the *code_to_temp*
>>> for differenr SoCs.
>>>
>>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>>> ---
>>>
>>> Changes in v2: None
>>> Changes in v1: None
>>>
>>>   drivers/thermal/rockchip_thermal.c | 64 
>>> ++++++++++++++++++++++++++++++--------
>>>   1 file changed, 51 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/drivers/thermal/rockchip_thermal.c 
>>> b/drivers/thermal/rockchip_thermal.c
>>> index e828f18..9df027f 100644
>>> --- a/drivers/thermal/rockchip_thermal.c
>>> +++ b/drivers/thermal/rockchip_thermal.c
>>> @@ -53,6 +53,16 @@ enum sensor_id {
>>>   };
>>>     /**
>>> +* The conversion table has the adc value and temperature.
>>> +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
>>> +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
>>> +*/
>>> +enum adc_flag {
>>> +    ADC_DECREMENT = 0,
>>> +    ADC_INCREMENT,
>>> +};
>>> +
>>> +/**
>>>    * The max sensors is two in rockchip SoCs.
>>>    * Two sensors: CPU and GPU sensor.
>>>    */
>>> @@ -66,6 +76,9 @@ struct chip_tsadc_table {
>>>         /* that analogic mask data */
>>>       unsigned long data_mask;
>>> +
>>> +    /* adc value is increment or decrement */
>>> +    unsigned int flag;

Sorry, I think to use the enum type will be better.

Says:
enum adc_sort_flag sort_flag;
or
enum adc_sort_mode  mode;

>>
>> Maybe bool? And rename to something more meaningful?
>
> Sure, that should be a bool type.
> I guess the rename in sort_flag......(maybe will have a better name)
>
>
>>
>> Or do you plan to have more conditions to test in your flag?
>
> Moment, the flag (increment or decrement) can support all the rockchip 
> series SoCs have thermal function.
>
>>>   };
>>>     struct rockchip_tsadc_chip {
>>> @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>         WARN_ON(table.length < 2);
>>>   -    code &= table.data_mask;
>>> -    if (code < table.id[high].code)
>>> +    switch (table.flag) {
>>> +    case ADC_DECREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[high].code)
>>>           return -EAGAIN;        /* Incorrect reading */
>> Add an indentation.
>
> Thanks, will be fixed in next patch.
>
>
>>>   -    while (low <= high) {
>>> -        if (code >= table.id[mid].code &&
>>> -            code < table.id[mid - 1].code)
>>> -            break;
>>> -        else if (code < table.id[mid].code)
>>> -            low = mid + 1;
>>> -        else
>>> -            high = mid - 1;
>>> -        mid = (low + high) / 2;
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid].code &&
>>> +                code < table.id[mid - 1].code)
>>> +                break;
>>> +            else if (code < table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    case ADC_INCREMENT:
>>> +        code &= table.data_mask;
>>> +        if (code < table.id[low].code)
>>> +        return -EAGAIN;        /* Incorrect reading */
>>> +
>> add an indentation.
>
> Ditto.
>
> Thanks,
> Caesar
>>
>>> +        while (low <= high) {
>>> +            if (code >= table.id[mid - 1].code &&
>>> +                code < table.id[mid].code)
>>> +                break;
>>> +            else if (code > table.id[mid].code)
>>> +                low = mid + 1;
>>> +            else
>>> +                high = mid - 1;
>>> +
>>> +            mid = (low + high) / 2;
>>> +        }
>>> +        break;
>>> +    default:
>>> +        pr_err("Invalid the table conversion\n");
>>>       }
>>>         /*
>>> @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct 
>>> chip_tsadc_table table, u32 code,
>>>        * to produce less granular result.
>>>        */
>>>       num = table.id[mid].temp - v2_code_table[mid - 1].temp;
>>> -    num *= table.id[mid - 1].code - code;
>>> -    denom = table.id[mid - 1].code - table.id[mid].code;
>>> +    num *= abs(table.id[mid - 1].code - code);
>>> +    denom = abs(table.id[mid - 1].code - table.id[mid].code);
>>>       *temp = table.id[mid - 1].temp + (num / denom);
>>>         return 0;
>>> @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip 
>>> rk3288_tsadc_data = {
>>>           .id = v2_code_table,
>>>           .length = ARRAY_SIZE(v2_code_table),
>>>           .data_mask = TSADCV2_DATA_MASK,
>>> +        .flag = ADC_DECREMENT,
>>>       },
>>>   };
>>>   --
>>> 1.9.1
>>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>

-- 
Thanks,
Caesar

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#1264220 — Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

Caesar,

On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> This series patchs are working for RK3368 on Rockchip platform.
> 

Good to see the perseverance! :-)

> @Heiko,
>     The PATCH [5/6] is working based on big/littel cluster cpufreq
>     added. Anyway, the PATCH [5/6] also work for next kernel.
> 
> @Eduardo,
> This patchset are based on linus master branch.
> Note: Need add the following thermal patchs for thermal driver before apply
> this series patchs.
> 
> 1) thermal: rockchip: fix handling of invalid readings
> (https://patchwork.kernel.org/patch/6973101/)
> 
> 2) thermal: rockhip: fix setting thermal shutdown polarity
> (https://patchwork.kernel.org/patch/6973131/)
> 
> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> (https://patchwork.kernel.org/patch/7472021/)
> 
> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
> (https://patchwork.kernel.org/patch/7472051/)
> 
> I'm glad these patchs have merged in thermal-soc git tree which can be found at
> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git

Yeah, apologize the delay on giving you a feedback on your code. As I
mentioned before, I had a couple of other things in past weeks that
consumed my time. 

Anyways, this specific patch series looks way better now that you have
split it further. I will have a better look on it again and let you
know when it will land.

BR,

Eduardo Valentin

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#1264230

Hi Eduardo, Caesar,

Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > This series patchs are working for RK3368 on Rockchip platform.
> > 
> 
> Good to see the perseverance! :-)
> 
> > @Heiko,
> >     The PATCH [5/6] is working based on big/littel cluster cpufreq
> >     added. Anyway, the PATCH [5/6] also work for next kernel.
> > 
> > @Eduardo,
> > This patchset are based on linus master branch.
> > Note: Need add the following thermal patchs for thermal driver before 
apply
> > this series patchs.
> > 
> > 1) thermal: rockchip: fix handling of invalid readings
> > (https://patchwork.kernel.org/patch/6973101/)
> > 
> > 2) thermal: rockhip: fix setting thermal shutdown polarity
> > (https://patchwork.kernel.org/patch/6973131/)
> > 
> > 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
> > (https://patchwork.kernel.org/patch/7472021/)
> > 
> > 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in 
s2r
> > (https://patchwork.kernel.org/patch/7472051/)
> > 
> > I'm glad these patchs have merged in thermal-soc git tree which can be 
found at
> > git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-
thermal.git
> 
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time. 
> 
> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

I call dibs on the devicetree patches :-) .

Code and dt parts are very much separate, so I'd like to take the dt parts 
though my tree and arm-soc to keep further dts changes together.
Of course only once you are ok with the code parts :-)

Devicetree parts themselfs look ok to me.

Heiko
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#1264237 — Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

Hi,

On Fri, Nov 06, 2015 at 08:03:24PM +0100, Heiko Stuebner wrote:
> Hi Eduardo, Caesar,
> 
> Am Freitag, 6. November 2015, 10:47:40 schrieb Eduardo Valentin:
> > On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
> > > This series patchs are working for RK3368 on Rockchip platform.
> > > 
> > 
> > Good to see the perseverance! :-)
> > 



> 
> I call dibs on the devicetree patches :-) .
> 
> Code and dt parts are very much separate, so I'd like to take the dt parts 
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
> 
> Devicetree parts themselfs look ok to me.
> 

I am picking 1-3 for now. Device tree part looks OK to me too.

> Heiko


BR,

Eduardo Valentin
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#1264868 — Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

Heiko,

在 2015年11月07日 03:03, Heiko Stuebner 写道:[]

[....]

> I call dibs on the devicetree patches :-) .
>
> Code and dt parts are very much separate, so I'd like to take the dt parts
> though my tree and arm-soc to keep further dts changes together.
> Of course only once you are ok with the code parts :-)
>
> Devicetree parts themselfs look ok to me.

Many thanks, I guess that I don't need send the dts patch again.;-)
the Code is still a bit change for thermal driver.

>
> Heiko
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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#1264945

Hi Caesar,

Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
> 在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
> 
> [....]
> 
> > I call dibs on the devicetree patches :-) .
> >
> > Code and dt parts are very much separate, so I'd like to take the dt parts
> > though my tree and arm-soc to keep further dts changes together.
> > Of course only once you are ok with the code parts :-)
> >
> > Devicetree parts themselfs look ok to me.
> 
> Many thanks, I guess that I don't need send the dts patch again.;-)
> the Code is still a bit change for thermal driver.

I think you should still send the dts patches with next revisions. I can
only take the patches, once Eduardo is satisfied with the code changes
that include the new binding, and while I hope that this will be in v3, it
will be hard if we get to v5 or so, to grep through the older revisions,
trying to find the dts changes :-).


Heiko
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#1265056 — Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

Hi Heiko,

在 2015年11月08日 07:13, Heiko Stuebner 写道:
> Hi Caesar,
>
> Am Samstag, 7. November 2015, 23:53:30 schrieb Caesar Wang:
>> 在 2015年11月07日 03:03, Heiko Stuebner 写道:[]
>>
>> [....]
>>
>>> I call dibs on the devicetree patches :-) .
>>>
>>> Code and dt parts are very much separate, so I'd like to take the dt parts
>>> though my tree and arm-soc to keep further dts changes together.
>>> Of course only once you are ok with the code parts :-)
>>>
>>> Devicetree parts themselfs look ok to me.
>> Many thanks, I guess that I don't need send the dts patch again.;-)
>> the Code is still a bit change for thermal driver.
> I think you should still send the dts patches with next revisions. I can
> only take the patches, once Eduardo is satisfied with the code changes
> that include the new binding, and while I hope that this will be in v3, it
> will be hard if we get to v5 or so, to grep through the older revisions,
> trying to find the dts changes :-).

Okay, I send the v3 patchs.


>
> Heiko
>

-- 
Thanks,
Caesar

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#1264867 — Re: [PATCH v2 0/9] Better compatible for the rockchip thermal and support RK3368 SoCs

Hi Eduardo,

在 2015年11月07日 02:47, Eduardo Valentin 写道:
> Caesar,
>
> On Thu, Nov 05, 2015 at 01:17:56PM +0800, Caesar Wang wrote:
>> This series patchs are working for RK3368 on Rockchip platform.
>>
> Good to see the perseverance! :-)

I will send th patch [4-6]  next version and another pacth(fix the long 
temp->int temp) on tomorrow.
Need the verify it on my board firstly.:-P


>
>> @Heiko,
>>      The PATCH [5/6] is working based on big/littel cluster cpufreq
>>      added. Anyway, the PATCH [5/6] also work for next kernel.
>>
>> @Eduardo,
>> This patchset are based on linus master branch.
>> Note: Need add the following thermal patchs for thermal driver before apply
>> this series patchs.
>>
>> 1) thermal: rockchip: fix handling of invalid readings
>> (https://patchwork.kernel.org/patch/6973101/)
>>
>> 2) thermal: rockhip: fix setting thermal shutdown polarity
>> (https://patchwork.kernel.org/patch/6973131/)
>>
>> 3) dt-bindings: rockchip-thermal: Add the pinctrl states in this document
>> (https://patchwork.kernel.org/patch/7472021/)
>>
>> 4) thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
>> (https://patchwork.kernel.org/patch/7472051/)
>>
>> I'm glad these patchs have merged in thermal-soc git tree which can be found at
>> git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
> Yeah, apologize the delay on giving you a feedback on your code. As I
> mentioned before, I had a couple of other things in past weeks that
> consumed my time.

I see, that have been a very response from you.
Thank you taking your time to review this series patchs.:-)


> Anyways, this specific patch series looks way better now that you have
> split it further. I will have a better look on it again and let you
> know when it will land.

Many thank again.

> BR,
>
> Eduardo Valentin
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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