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[PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer

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  [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer Jisheng Zhang <jszhang@marvell.com> - 2015-11-03 15:40 +0100
    [PATCH v2 2/3] ARM: arch_timer: set the arch_delay_timer rating as 400 Jisheng Zhang <jszhang@marvell.com> - 2015-11-03 15:40 +0100
    Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay  timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-11-04 10:50 +0100
      Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer Arnd Bergmann <arnd@arndb.de> - 2015-11-04 11:40 +0100
        Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay  timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-11-04 12:30 +0100
          Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer Arnd Bergmann <arnd@arndb.de> - 2015-11-04 13:30 +0100
            Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best  delay timer Jisheng Zhang <jszhang@marvell.com> - 2015-11-05 03:50 +0100

#1261542 — [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer

In case there are several possible delay timers, we purely base the
selection on the frequency, which is suboptimal in some cases. Take
one Marvell Berlin platform for example: we have arch timer and dw-apb
timer. The arch timer freq is 25MHZ while the dw-apb timer freq is
100MHZ, current selection would choose the dw-apb timer. But the dw
apb timer is on the APB bus while arch timer sits in CPU, the cost
of accessing the apb timer is higher than the arch timer.
    
This series firstly modifies register_current_timer_delay() to choose
the highest rating delay timer: use the rating as a primary indication
and fall back to comparing the frequency if the rating is not set or
the same. Then we set the arch_delay_timer rating as 400, finally
Implement ARM delay timer for the dw_apb_timer and set its rating as 300.

Since v1:
 - add one patch to let register_current_timer_delay() to choose the the
   highest rating delay timer
 - add one patch to set arch_delay_timer rating as 400
 - remove CONFIG_DW_APB_TIMER_BASED_DELAY option, use CONFIG_ARM instead.
 - change the commit msg as "clocksource/drivers/abc: Foo...."


Jisheng Zhang (3):
  ARM: delay: choose the highest rating delay timer
  ARM: arch_timer: set the arch_delay_timer rating as 400
  clocksource/drivers/dw_apb_timer_of: Implement ARM delay timer

 arch/arm/include/asm/delay.h          |  1 +
 arch/arm/kernel/arch_timer.c          |  1 +
 arch/arm/lib/delay.c                  | 16 +++++++++++++++-
 drivers/clocksource/dw_apb_timer_of.c | 17 +++++++++++++++++
 4 files changed, 34 insertions(+), 1 deletion(-)

-- 
2.6.2

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#1261544 — [PATCH v2 2/3] ARM: arch_timer: set the arch_delay_timer rating as 400

This patch sets the arch_delay_timer rating as the same value used in
arch_timer clocksource. This is to help register_current_timer_delay()
to choose the best delay timer during several possible delay timers.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 arch/arm/kernel/arch_timer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index 1791f12..db5f556 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -28,6 +28,7 @@ static void __init arch_timer_delay_timer_register(void)
 	/* Use the architected timer for the delay loop. */
 	arch_delay_timer.read_current_timer = arch_timer_read_counter_long;
 	arch_delay_timer.freq = arch_timer_get_rate();
+	arch_delay_timer.rating = 400;
 	register_current_timer_delay(&arch_delay_timer);
 }
 
-- 
2.6.2

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#1262161 — Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer

On 11/03/2015 03:28 PM, Jisheng Zhang wrote:
> In case there are several possible delay timers, we purely base the
> selection on the frequency, which is suboptimal in some cases. Take
> one Marvell Berlin platform for example: we have arch timer and dw-apb
> timer. The arch timer freq is 25MHZ while the dw-apb timer freq is
> 100MHZ, current selection would choose the dw-apb timer. But the dw
> apb timer is on the APB bus while arch timer sits in CPU, the cost
> of accessing the apb timer is higher than the arch timer.
>
> This series firstly modifies register_current_timer_delay() to choose
> the highest rating delay timer: use the rating as a primary indication
> and fall back to comparing the frequency if the rating is not set or
> the same. Then we set the arch_delay_timer rating as 400, finally
> Implement ARM delay timer for the dw_apb_timer and set its rating as 300.

Hi Jisheng, Arnd,

I don't feel comfortable with the rating / freq think. I am afraid this 
approach based on heuristic will bring a lot of complexity and 
workarounds in the code for a small benefit.

Why don't we define a DT entry for the delay timer ? So we delegate the 
choice to the platform DT definition.


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#1262193

On Wednesday 04 November 2015 10:46:49 Daniel Lezcano wrote:
> On 11/03/2015 03:28 PM, Jisheng Zhang wrote:
> > In case there are several possible delay timers, we purely base the
> > selection on the frequency, which is suboptimal in some cases. Take
> > one Marvell Berlin platform for example: we have arch timer and dw-apb
> > timer. The arch timer freq is 25MHZ while the dw-apb timer freq is
> > 100MHZ, current selection would choose the dw-apb timer. But the dw
> > apb timer is on the APB bus while arch timer sits in CPU, the cost
> > of accessing the apb timer is higher than the arch timer.
> >
> > This series firstly modifies register_current_timer_delay() to choose
> > the highest rating delay timer: use the rating as a primary indication
> > and fall back to comparing the frequency if the rating is not set or
> > the same. Then we set the arch_delay_timer rating as 400, finally
> > Implement ARM delay timer for the dw_apb_timer and set its rating as 300.
> 
> Hi Jisheng, Arnd,
> 
> I don't feel comfortable with the rating / freq think. I am afraid this 
> approach based on heuristic will bring a lot of complexity and 
> workarounds in the code for a small benefit.
> 
> Why don't we define a DT entry for the delay timer ? So we delegate the 
> choice to the platform DT definition.

That would be wrong, because the fact that Linux uses a timer to
optimize its udelay() function is not a feature of the hardware.

	Arnd
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#1262220 — Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer

On 11/04/2015 11:30 AM, Arnd Bergmann wrote:
> On Wednesday 04 November 2015 10:46:49 Daniel Lezcano wrote:
>> On 11/03/2015 03:28 PM, Jisheng Zhang wrote:
>>> In case there are several possible delay timers, we purely base the
>>> selection on the frequency, which is suboptimal in some cases. Take
>>> one Marvell Berlin platform for example: we have arch timer and dw-apb
>>> timer. The arch timer freq is 25MHZ while the dw-apb timer freq is
>>> 100MHZ, current selection would choose the dw-apb timer. But the dw
>>> apb timer is on the APB bus while arch timer sits in CPU, the cost
>>> of accessing the apb timer is higher than the arch timer.
>>>
>>> This series firstly modifies register_current_timer_delay() to choose
>>> the highest rating delay timer: use the rating as a primary indication
>>> and fall back to comparing the frequency if the rating is not set or
>>> the same. Then we set the arch_delay_timer rating as 400, finally
>>> Implement ARM delay timer for the dw_apb_timer and set its rating as 300.
>>
>> Hi Jisheng, Arnd,
>>
>> I don't feel comfortable with the rating / freq think. I am afraid this
>> approach based on heuristic will bring a lot of complexity and
>> workarounds in the code for a small benefit.
>>
>> Why don't we define a DT entry for the delay timer ? So we delegate the
>> choice to the platform DT definition.
>
> That would be wrong, because the fact that Linux uses a timer to
> optimize its udelay() function is not a feature of the hardware.

True.

Any ideas / suggestions for an alternative ?



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<http://www.linaro.org/linaro-blog/> Blog

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#1262253

On Wednesday 04 November 2015 12:19:57 Daniel Lezcano wrote:
> On 11/04/2015 11:30 AM, Arnd Bergmann wrote:
> > On Wednesday 04 November 2015 10:46:49 Daniel Lezcano wrote:
> >> On 11/03/2015 03:28 PM, Jisheng Zhang wrote:
> >>> In case there are several possible delay timers, we purely base the
> >>> selection on the frequency, which is suboptimal in some cases. Take
> >>> one Marvell Berlin platform for example: we have arch timer and dw-apb
> >>> timer. The arch timer freq is 25MHZ while the dw-apb timer freq is
> >>> 100MHZ, current selection would choose the dw-apb timer. But the dw
> >>> apb timer is on the APB bus while arch timer sits in CPU, the cost
> >>> of accessing the apb timer is higher than the arch timer.
> >>>
> >>> This series firstly modifies register_current_timer_delay() to choose
> >>> the highest rating delay timer: use the rating as a primary indication
> >>> and fall back to comparing the frequency if the rating is not set or
> >>> the same. Then we set the arch_delay_timer rating as 400, finally
> >>> Implement ARM delay timer for the dw_apb_timer and set its rating as 300.
> >>
> >> Hi Jisheng, Arnd,
> >>
> >> I don't feel comfortable with the rating / freq think. I am afraid this
> >> approach based on heuristic will bring a lot of complexity and
> >> workarounds in the code for a small benefit.
> >>
> >> Why don't we define a DT entry for the delay timer ? So we delegate the
> >> choice to the platform DT definition.
> >
> > That would be wrong, because the fact that Linux uses a timer to
> > optimize its udelay() function is not a feature of the hardware.
> 
> True.
> 
> Any ideas / suggestions for an alternative ?

How about simply hardcoding the fact that we prefer the arch timer
over any other one for delay as I suggested earlier?

Another idea I just had is to do nothing: According to Jisheng's
description for this series, the reason for preferring the arch
timer is that it is faster to access. However, we could argue
that this actually doesn't matter at all, because the entire
point of the ndelay()/udelay()/mdelay() functions is to waste
CPU cycles doing not much at all, so we can just as well waste
them reading the timer register than spinning on the CPU reading
the arch timer more often.

	Arnd
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#1262844 — Re: [PATCH v2 0/3] let Marvell Berlin SoCs make use of the best delay timer

Dear Arnd and Daniel,

On Wed, 4 Nov 2015 13:19:53 +0100
Arnd Bergmann wrote:

> On Wednesday 04 November 2015 12:19:57 Daniel Lezcano wrote:
> > On 11/04/2015 11:30 AM, Arnd Bergmann wrote:  
> > > On Wednesday 04 November 2015 10:46:49 Daniel Lezcano wrote:  
> > >> On 11/03/2015 03:28 PM, Jisheng Zhang wrote:  
> > >>> In case there are several possible delay timers, we purely base the
> > >>> selection on the frequency, which is suboptimal in some cases. Take
> > >>> one Marvell Berlin platform for example: we have arch timer and dw-apb
> > >>> timer. The arch timer freq is 25MHZ while the dw-apb timer freq is
> > >>> 100MHZ, current selection would choose the dw-apb timer. But the dw
> > >>> apb timer is on the APB bus while arch timer sits in CPU, the cost
> > >>> of accessing the apb timer is higher than the arch timer.
> > >>>
> > >>> This series firstly modifies register_current_timer_delay() to choose
> > >>> the highest rating delay timer: use the rating as a primary indication
> > >>> and fall back to comparing the frequency if the rating is not set or
> > >>> the same. Then we set the arch_delay_timer rating as 400, finally
> > >>> Implement ARM delay timer for the dw_apb_timer and set its rating as 300.  
> > >>
> > >> Hi Jisheng, Arnd,
> > >>
> > >> I don't feel comfortable with the rating / freq think. I am afraid this
> > >> approach based on heuristic will bring a lot of complexity and
> > >> workarounds in the code for a small benefit.
> > >>
> > >> Why don't we define a DT entry for the delay timer ? So we delegate the
> > >> choice to the platform DT definition.  
> > >
> > > That would be wrong, because the fact that Linux uses a timer to
> > > optimize its udelay() function is not a feature of the hardware.  
> > 
> > True.
> > 
> > Any ideas / suggestions for an alternative ?  
> 
> How about simply hardcoding the fact that we prefer the arch timer
> over any other one for delay as I suggested earlier?
> 
> Another idea I just had is to do nothing: According to Jisheng's
> description for this series, the reason for preferring the arch
> timer is that it is faster to access. However, we could argue
> that this actually doesn't matter at all, because the entire
> point of the ndelay()/udelay()/mdelay() functions is to waste
> CPU cycles doing not much at all, so we can just as well waste
> them reading the timer register than spinning on the CPU reading
> the arch timer more often.
> 

I like this "Another idea", indeed, the delay timer speed doesn't matter
at all. So I just cooked v3 to simply register dw apb based delay timer.

Thanks a lot for the inspiration,
Jisheng
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