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Groups > linux.kernel > #1259255 > unrolled thread

[PATCH v5 0/3] NAND support for Broadcom NS2 SoC

Started byAnup Patel <anup.patel@broadcom.com>
First post2015-10-30 08:00 +0100
Last post2015-10-30 20:40 +0100
Articles 3 — 2 participants

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  [PATCH v5 0/3] NAND support for Broadcom NS2 SoC Anup Patel <anup.patel@broadcom.com> - 2015-10-30 08:00 +0100
    [PATCH v5 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2 Anup Patel <anup.patel@broadcom.com> - 2015-10-30 08:10 +0100
    Re: [PATCH v5 0/3] NAND support for Broadcom NS2 SoC Brian Norris <computersforpeace@gmail.com> - 2015-10-30 20:40 +0100

#1259255 — [PATCH v5 0/3] NAND support for Broadcom NS2 SoC

FromAnup Patel <anup.patel@broadcom.com>
Date2015-10-30 08:00 +0100
Subject[PATCH v5 0/3] NAND support for Broadcom NS2 SoC
Message-ID<qpbPj-2tf-3@gated-at.bofh.it>
We enable NAND support for Broadcom NS2 SoC by reusing existing
BRCMNAND driver.

This patchset applies on-top of "arm64: Simple additions to
NS2 DT" v1 patchset and is available in ns2_nand_v5 branch of
https://github.com/Broadcom/arm64-linux.git.

The patchset is tested on NS2 SVK.

Changes since v4:
 - Fix accidental typo in patch2 regarding use of CFG_BUS_WIDTH

Changes since v3:
 - Include Brian's patch for magic number cleanup related to
   CFG and CFG_EXT registers
 - Base patch1 of v3 patchset upon Brian's cleanup patch

Changes since v2:
 - Dropped patch1 and patch2 because these are already merged
   by MTD maintainer.
 - Avoid using absolute node paths in ns2-svk.dts.

Changes since v1:
 - Dropped patch3 and patch4 because we don't need to reset
   BRCMNAND controller for NS2.
 - Added patch to force 8bit mode before doing nand_scan_ident()
   in brcmnand_init_cs().

Anup Patel (2):
  mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()
  arm64: dts: Add BRCM IPROC NAND DT node for NS2

Brian Norris (1):
  mtd: brcmnand: factor out CFG and CFG_EXT bitfields

 arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 +++++++++++++-------
 arch/arm64/boot/dts/broadcom/ns2.dtsi    | 14 ++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c     | 48 +++++++++++++++++++++++++++-----
 3 files changed, 75 insertions(+), 17 deletions(-)

-- 
1.9.1

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#1259258 — [PATCH v5 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2

FromAnup Patel <anup.patel@broadcom.com>
Date2015-10-30 08:10 +0100
Subject[PATCH v5 3/3] arm64: dts: Add BRCM IPROC NAND DT node for NS2
Message-ID<qpbYZ-2NI-7@gated-at.bofh.it>
In reply to#1259255
The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.

This patch also fixes use of node labels in ns2-svk.dts.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
---
 arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 ++++++++++++++++++++----------
 arch/arm64/boot/dts/broadcom/ns2.dtsi    | 14 ++++++++++++++
 2 files changed, 34 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index e5950d5..6bb3d4d 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -50,18 +50,28 @@
 		device_type = "memory";
 		reg = <0x000000000 0x80000000 0x00000000 0x40000000>;
 	};
+};
 
-	soc: soc {
-		i2c0: i2c@66080000 {
-			status = "ok";
-		};
+&i2c0 {
+	status = "ok";
+};
 
-		i2c1: i2c@660b0000 {
-			status = "ok";
-		};
+&i2c1 {
+	status = "ok";
+};
+
+&uart3 {
+	status = "ok";
+};
 
-		uart3: serial@66130000 {
-			status = "ok";
-		};
+&nand {
+	nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		#address-cells = <1>;
+		#size-cells = <1>;
 	};
 };
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index f603277..9610822 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -212,5 +212,19 @@
 			compatible = "brcm,iproc-rng200";
 			reg = <0x66220000 0x28>;
 		};
+
+		nand: nand@66460000 {
+			compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
+			reg = <0x66460000 0x600>,
+			      <0x67015408 0x600>,
+			      <0x66460f00 0x20>;
+			reg-names = "nand", "iproc-idm", "iproc-ext";
+			interrupts = <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			brcm,nand-has-wp;
+		};
 	};
 };
-- 
1.9.1

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#1259744

FromBrian Norris <computersforpeace@gmail.com>
Date2015-10-30 20:40 +0100
Message-ID<qpnGO-1pv-1@gated-at.bofh.it>
In reply to#1259255
On Fri, Oct 30, 2015 at 12:29:18PM +0530, Anup Patel wrote:
> We enable NAND support for Broadcom NS2 SoC by reusing existing
> BRCMNAND driver.
> 
> This patchset applies on-top of "arm64: Simple additions to
> NS2 DT" v1 patchset and is available in ns2_nand_v5 branch of
> https://github.com/Broadcom/arm64-linux.git.
> 
> The patchset is tested on NS2 SVK.

Applied patches 1 and 2. My "Reviewed-by" on patch 3 stands.

Thanks,
Brian
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