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[PATCH -tip 0/4] A few updates around smp_store_mb()

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  [PATCH -tip 0/4] A few updates around smp_store_mb() Davidlohr Bueso <dave@stgolabs.net> - 2015-10-27 21:00 +0100
    [PATCH 2/4] arch,barrier: Use smp barriers in smp_store_release() Davidlohr Bueso <dave@stgolabs.net> - 2015-10-27 21:00 +0100
      Re: [PATCH 2/4] arch,barrier: Use smp barriers in smp_store_release() Davidlohr Bueso <dave@stgolabs.net> - 2015-10-27 21:10 +0100
    [PATCH 1/4] arch,cmpxchg: Remove tas() definitions Davidlohr Bueso <dave@stgolabs.net> - 2015-10-27 21:00 +0100
      Re: [PATCH 1/4] arch,cmpxchg: Remove tas() definitions David Howells <dhowells@redhat.com> - 2015-10-28 00:30 +0100

#1257167 — [PATCH -tip 0/4] A few updates around smp_store_mb()

Hi,

Other than Peter's recent rename of set_mb to reflect the SMP
ordering nature of the call, there really hasn't updates that
further reflect this. Here are some pretty straightforward
updates, but ultimately wonder if we cannot make the call the
same for all archs; which is where we seem to be headed _anyway_,
more of this in Patch 3 which updates x86.

Patch 1 is just one a snuck in while looking at arch code.

Only tested on the x86 bits.

Thanks!

Davidlohr Bueso (4):
  arch,cmpxchg: Remove tas() definitions
  arch,barrier: Use smp barriers in smp_store_release()
  x86,asm: Re-work smp_store_mb()
  doc,smp: Remove ambiguous statement in smp_store_mb()

 Documentation/memory-barriers.txt   | 4 ++--
 arch/blackfin/include/asm/cmpxchg.h | 1 -
 arch/c6x/include/asm/cmpxchg.h      | 2 --
 arch/frv/include/asm/cmpxchg.h      | 2 --
 arch/ia64/include/asm/barrier.h     | 2 +-
 arch/powerpc/include/asm/barrier.h  | 2 +-
 arch/s390/include/asm/barrier.h     | 2 +-
 arch/tile/include/asm/cmpxchg.h     | 2 --
 arch/x86/include/asm/barrier.h      | 8 ++++++--
 include/asm-generic/barrier.h       | 2 +-
 10 files changed, 12 insertions(+), 15 deletions(-)

-- 
2.1.4

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#1257168 — [PATCH 2/4] arch,barrier: Use smp barriers in smp_store_release()

With b92b8b35a2e (locking/arch: Rename set_mb() to smp_store_mb())
it was made clear that the context of this call (and thus set_mb)
is strictly for CPU ordering, as opposed to IO. As such all archs
should use the smp variant of mb(), respecting the semantics and
saving a mandatory barrier on UP.

Cc: Tony Luck <tony.luck@intel.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
---

Completely untested.

 arch/ia64/include/asm/barrier.h    | 2 +-
 arch/powerpc/include/asm/barrier.h | 2 +-
 arch/s390/include/asm/barrier.h    | 2 +-
 include/asm-generic/barrier.h      | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h
index df896a1..209c4b8 100644
--- a/arch/ia64/include/asm/barrier.h
+++ b/arch/ia64/include/asm/barrier.h
@@ -77,7 +77,7 @@ do {									\
 	___p1;								\
 })
 
-#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 
 /*
  * The group barrier in front of the rsm & ssm are necessary to ensure
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
index 0eca6ef..a7af5fb 100644
--- a/arch/powerpc/include/asm/barrier.h
+++ b/arch/powerpc/include/asm/barrier.h
@@ -34,7 +34,7 @@
 #define rmb()  __asm__ __volatile__ ("sync" : : : "memory")
 #define wmb()  __asm__ __volatile__ ("sync" : : : "memory")
 
-#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 
 #ifdef __SUBARCH_HAS_LWSYNC
 #    define SMPWMB      LWSYNC
diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h
index d48fe01..d360737 100644
--- a/arch/s390/include/asm/barrier.h
+++ b/arch/s390/include/asm/barrier.h
@@ -36,7 +36,7 @@
 #define smp_mb__before_atomic()		smp_mb()
 #define smp_mb__after_atomic()		smp_mb()
 
-#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 
 #define smp_store_release(p, v)						\
 do {									\
diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index b42afad..0f45f93 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -93,7 +93,7 @@
 #endif	/* CONFIG_SMP */
 
 #ifndef smp_store_mb
-#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 #endif
 
 #ifndef smp_mb__before_atomic
-- 
2.1.4

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#1257171 — Re: [PATCH 2/4] arch,barrier: Use smp barriers in smp_store_release()

So the subject should actually say 'smp_store_mb()'... barriers here, bariers
there, barriers everywhere.
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#1257169 — [PATCH 1/4] arch,cmpxchg: Remove tas() definitions

It seems that 5dc12ddee93 (Remove tas()) missed some files. Correct
this and fully drop this macro, for which we should be using cmpxchg
like calls.

Cc: Steven Miao <realmz6@gmail.com>
Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Chris Metcalf <cmetcalf@ezchip.com>
Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
---
 arch/blackfin/include/asm/cmpxchg.h | 1 -
 arch/c6x/include/asm/cmpxchg.h      | 2 --
 arch/frv/include/asm/cmpxchg.h      | 2 --
 arch/tile/include/asm/cmpxchg.h     | 2 --
 4 files changed, 7 deletions(-)

diff --git a/arch/blackfin/include/asm/cmpxchg.h b/arch/blackfin/include/asm/cmpxchg.h
index c05868c..2539288 100644
--- a/arch/blackfin/include/asm/cmpxchg.h
+++ b/arch/blackfin/include/asm/cmpxchg.h
@@ -128,6 +128,5 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
 #endif /* !CONFIG_SMP */
 
 #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
-#define tas(ptr) ((void)xchg((ptr), 1))
 
 #endif /* __ARCH_BLACKFIN_CMPXCHG__ */
diff --git a/arch/c6x/include/asm/cmpxchg.h b/arch/c6x/include/asm/cmpxchg.h
index b27c8ce..93d0a5a 100644
--- a/arch/c6x/include/asm/cmpxchg.h
+++ b/arch/c6x/include/asm/cmpxchg.h
@@ -47,8 +47,6 @@ static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size)
 #define xchg(ptr, x) \
 	((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \
 				    sizeof(*(ptr))))
-#define tas(ptr)    xchg((ptr), 1)
-
 
 #include <asm-generic/cmpxchg-local.h>
 
diff --git a/arch/frv/include/asm/cmpxchg.h b/arch/frv/include/asm/cmpxchg.h
index 5b04dd0..a899765 100644
--- a/arch/frv/include/asm/cmpxchg.h
+++ b/arch/frv/include/asm/cmpxchg.h
@@ -69,8 +69,6 @@ extern uint32_t __xchg_32(uint32_t i, volatile void *v);
 
 #endif
 
-#define tas(ptr) (xchg((ptr), 1))
-
 /*****************************************************************************/
 /*
  * compare and conditionally exchange value with memory
diff --git a/arch/tile/include/asm/cmpxchg.h b/arch/tile/include/asm/cmpxchg.h
index 0ccda3c..25d5899 100644
--- a/arch/tile/include/asm/cmpxchg.h
+++ b/arch/tile/include/asm/cmpxchg.h
@@ -127,8 +127,6 @@ long long _atomic64_cmpxchg(long long *v, long long o, long long n);
 
 #endif
 
-#define tas(ptr) xchg((ptr), 1)
-
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_TILE_CMPXCHG_H */
-- 
2.1.4

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#1257468 — Re: [PATCH 1/4] arch,cmpxchg: Remove tas() definitions

Davidlohr Bueso <dave@stgolabs.net> wrote:

> It seems that 5dc12ddee93 (Remove tas()) missed some files. Correct
> this and fully drop this macro, for which we should be using cmpxchg
> like calls.
> 
> Cc: Steven Miao <realmz6@gmail.com>
> Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
> Cc: Chris Metcalf <cmetcalf@ezchip.com>
> Signed-off-by: Davidlohr Bueso <dbueso@suse.de>

Acked-by: David Howells <dhowells@redhat.com> [frv]
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