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[PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC reset controller.

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  [PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC reset controller. Chen Feng <puck.chen@hisilicon.com> - 2015-10-29 14:00 +0100
    [PATCH V6 3/3] Add reset-cell node for hi6220 reset controller Chen Feng <puck.chen@hisilicon.com> - 2015-10-29 14:00 +0100
    Re: [PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC  reset controller. Philipp Zabel <p.zabel@pengutronix.de> - 2015-10-29 17:20 +0100

#1258772 — [PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC reset controller.

docs: dts: Added documentation for hi6220 Reset Controller

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
---
 .../bindings/reset/hisilicon,hi6220-reset.txt      | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt

diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
new file mode 100644
index 0000000..be06352
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
@@ -0,0 +1,32 @@
+Hisilicon System Reset Controller
+======================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+The reset controller registers are part of the system-ctl block on
+hi6220 SoC.
+
+Required properties:
+- compatible: may be "hisilicon,hi6220-sysctrl"
+- reg: should be register base and length as documented in the
+  datasheet
+- #reset-cells: 1, see below
+
+Example:
+sys_ctrl: sys_ctrl@f7030000 {
+	compatible = "hisilicon,hi6220-sysctrl", "syscon";
+	reg = <0x0 0xf7030000 0x0 0x2000>;
+	#clock-cells = <1>;
+	#reset-cells = <1>;
+};
+
+Specifying reset lines connected to IP modules
+==============================================
+example:
+
+        uart1: uart1@..... {
+                ...
+                resets = <&sys_ctrl 0x305>;
+                ...
+        };
-- 
1.9.1

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#1258773 — [PATCH V6 3/3] Add reset-cell node for hi6220 reset controller

arm64: dts: Add dts node for reset controller

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 3f03380..e45dbb1 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -146,6 +146,7 @@
 			compatible = "hisilicon,hi6220-sysctrl", "syscon";
 			reg = <0x0 0xf7030000 0x0 0x2000>;
 			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		media_ctrl: media_ctrl@f4410000 {
-- 
1.9.1

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#1258901 — Re: [PATCH V6 1/3] Add DT bindings documentation for hi6220 SoC reset controller.

Hi,

A few small issues remaining. 

Am Donnerstag, den 29.10.2015, 20:55 +0800 schrieb Chen Feng:
> docs: dts: Added documentation for hi6220 Reset Controller

Better to switch the description and the Subject of the e-mail.
Actually, the subject line and patch description already was fine in V4.
Prefixes like "reset: ..." and "dt-bindings: ..." should be in the
subject instead of the commit message body.

> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
> ---
>  .../bindings/reset/hisilicon,hi6220-reset.txt      | 32 ++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
> 
> diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
> new file mode 100644
> index 0000000..be06352
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt
> @@ -0,0 +1,32 @@
> +Hisilicon System Reset Controller
> +======================================
> +
> +Please also refer to reset.txt in this directory for common reset
> +controller binding usage.
> +
> +The reset controller registers are part of the system-ctl block on
> +hi6220 SoC.
> +
> +Required properties:
> +- compatible: may be "hisilicon,hi6220-sysctrl"
> +- reg: should be register base and length as documented in the
> +  datasheet
> +- #reset-cells: 1, see below
> +
> +Example:
> +sys_ctrl: sys_ctrl@f7030000 {
> +	compatible = "hisilicon,hi6220-sysctrl", "syscon";
> +	reg = <0x0 0xf7030000 0x0 0x2000>;
> +	#clock-cells = <1>;
> +	#reset-cells = <1>;
> +};

This example is not indented. That is ok, but the example below is
indented by a tab. Please choose one style for both.

> +
> +Specifying reset lines connected to IP modules
> +==============================================
> +example:

That probably should be "Example:".

> +
> +        uart1: uart1@..... {

That should be "uart1: serial@...", as Rob already pointed out.

> +                ...
> +                resets = <&sys_ctrl 0x305>;

Better use PERIPH_RSTEN3_UART1 instead of 0x305 here.

> +                ...
> +        };

Also add a pointer to the hisi,hi6220-resets.h here, for example:

A list of valid reset signals can be found in:
include/dt-bindings/reset/hisi,hi6220-resets.h

Also, that header file should be part of this patch, instead of the
driver patch.

best regards
Philipp

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