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[PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model

Started byDawei Chien <dawei.chien@mediatek.com>
First post2015-10-22 14:10 +0200
Last post2015-10-28 16:50 +0100
Articles 5 — 2 participants

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  [PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model Dawei Chien <dawei.chien@mediatek.com> - 2015-10-22 14:10 +0200
    [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173. Dawei Chien <dawei.chien@mediatek.com> - 2015-10-22 14:10 +0200
      Re: [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for  mt8173. Viresh Kumar <viresh.kumar@linaro.org> - 2015-10-28 16:40 +0100
    [PATCH v3 1/2] thermal: mediatek: Add cpu power cooling model. Dawei Chien <dawei.chien@mediatek.com> - 2015-10-22 14:10 +0200
    Re: [PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model Viresh Kumar <viresh.kumar@linaro.org> - 2015-10-28 16:50 +0100

#1253739 — [PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model

FromDawei Chien <dawei.chien@mediatek.com>
Date2015-10-22 14:10 +0200
Subject[PATCH v3 0/2] thermal: mediatek: Add cpu power cooling model
Message-ID<qmmQW-1Wt-17@gated-at.bofh.it>
Use Intelligent Power Allocation (IPA) technical to add static/dynamic power model for binding CPU thermal zone.
The power allocator governor allocates power budget to control CPU temperature.

Power Allocator governor is able to keep SOC temperature within a defined temperature range to avoid SOC overheat and keep it's performance. mt8173-cpufreq.c need to register its' own power model with power allocator thermal governor, so that power allocator governor can allocates suitable power budget to control CPU temperature.

PATCH1 is base on
https://patchwork.kernel.org/patch/7034601/

PATCH2 is base on Sascha's thermal driver V9
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/

Change since V1:
include mt8171.h and sort header file for mt8173.dtsi

Change since V2:
Move dynamic/static power model in device tree

Dawei.Chien (2):
  thermal: mediatek: Add cpu power cooling model.
  arm64: dts: mt8173: Add thermal zone node for mt8173.

 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   44 ++++++++++++++
 drivers/cpufreq/mt8173-cpufreq.c         |   97 ++++++++++++++++++++++++++----
 2 files changed, 130 insertions(+), 11 deletions(-)

--
1.7.9.5
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#1253740 — [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

FromDawei Chien <dawei.chien@mediatek.com>
Date2015-10-22 14:10 +0200
Subject[PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.
Message-ID<qmmQW-1Wt-21@gated-at.bofh.it>
In reply to#1253739
Add thermal zone node to mt8173.dtsi.

Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
---
This patch is base on
https://patchwork.kernel.org/patch/7249821/
https://patchwork.kernel.org/patch/7249861/
https://patchwork.kernel.org/patch/7249891/
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   90 ++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3b18f37..eaf12bf 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -16,6 +16,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/mt8173-power.h>
 #include <dt-bindings/reset-controller/mt8173-resets.h>
+#include <dt-bindings/thermal/mt8173.h>
 #include "mt8173-pinfunc.h"
 
 / {
@@ -54,6 +55,18 @@
 			reg = <0x000>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				859000  43
+				908000  52
+				983000  86
+				1009000 123
+				1028000 138
+				1083000 172
+				1110900 180
+				1125000 192
+			>;
+			dynamic-power-coefficient = <263>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu@1 {
@@ -62,6 +75,17 @@
 			reg = <0x001>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				859000  43
+				908000  52
+				983000  86
+				1009000 123
+				1028000 138
+				1083000 172
+				1110900 180
+				1125000 192
+			>;
+			dynamic-power-coefficient = <263>;
 		};
 
 		cpu2: cpu@100 {
@@ -70,6 +94,18 @@
 			reg = <0x100>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				828000  72
+				867000  90
+				927000  156
+				968000  181
+				1007000 298
+				1049000 435
+				1089900 533
+				1125000 533
+			>;
+			dynamic-power-coefficient = <530>;
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@101 {
@@ -78,6 +114,17 @@
 			reg = <0x101>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			static-power-points = <
+				828000  72
+				867000  90
+				927000  156
+				968000  181
+				1007000 298
+				1049000 435
+				1089900 533
+				1125000 533
+			>;
+			dynamic-power-coefficient = <530>;
 		};
 
 		idle-states {
@@ -116,6 +163,49 @@
 		clock-output-names = "clk32k";
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu_thermal {
+			polling-delay-passive = <1000>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+
+			thermal-sensors = <&thermal MT8173_THERMAL_ZONE_CA57>;
+			sustainable-power = <1500>;
+
+			trips {
+				threshold: trip-point@0 {
+					temperature = <68000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				target: trip-point@1 {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+
+				cpu_crit: cpu_crit@0 {
+					temperature = <115000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map@0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 0 0>;
+					contribution = <1024>;
+				};
+				map@1 {
+					trip = <&target>;
+					cooling-device = <&cpu2 0 0>;
+					contribution = <2048>;
+				};
+			};
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&gic>;
-- 
1.7.9.5

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#1258261 — Re: [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.

FromViresh Kumar <viresh.kumar@linaro.org>
Date2015-10-28 16:40 +0100
SubjectRe: [PATCH v3 2/2] arm64: dts: mt8173: Add thermal zone node for mt8173.
Message-ID<qoAZs-4r5-41@gated-at.bofh.it>
In reply to#1253740
On 22-10-15, 20:02, Dawei Chien wrote:
> Add thermal zone node to mt8173.dtsi.
> 
> Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
> ---
> This patch is base on
> https://patchwork.kernel.org/patch/7249821/
> https://patchwork.kernel.org/patch/7249861/
> https://patchwork.kernel.org/patch/7249891/
> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   90 ++++++++++++++++++++++++++++++
>  1 file changed, 90 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 3b18f37..eaf12bf 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -16,6 +16,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/power/mt8173-power.h>
>  #include <dt-bindings/reset-controller/mt8173-resets.h>
> +#include <dt-bindings/thermal/mt8173.h>
>  #include "mt8173-pinfunc.h"
>  
>  / {
> @@ -54,6 +55,18 @@
>  			reg = <0x000>;
>  			enable-method = "psci";
>  			cpu-idle-states = <&CPU_SLEEP_0>;
> +			static-power-points = <
> +				859000  43
> +				908000  52
> +				983000  86
> +				1009000 123
> +				1028000 138
> +				1083000 172
> +				1110900 180
> +				1125000 192

What's the unit of power here? Is this power accurate? Or just a
number representing the power ?

> +			>;
> +			dynamic-power-coefficient = <263>;
> +			#cooling-cells = <2>;
>  		};

@Rob: Looks like another good candidate for the OPP-v2 table? Power.

-- 
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#1253747 — [PATCH v3 1/2] thermal: mediatek: Add cpu power cooling model.

FromDawei Chien <dawei.chien@mediatek.com>
Date2015-10-22 14:10 +0200
Subject[PATCH v3 1/2] thermal: mediatek: Add cpu power cooling model.
Message-ID<qmmQX-1Wt-43@gated-at.bofh.it>
In reply to#1253739
This power model is base on Intelligent Power Allocation (IPA)
technical, requires that the operating-points of the CPUs are
registered using the kernel's opp library and the
`cpufreq_frequency_table` is assigned to the `struct device`
of the cpu MT8173.

Signed-off-by: Dawei.Chien <dawei.chien@mediatek.com>
---
This patch is base on
https://patchwork.kernel.org/patch/7034601/
---
 drivers/cpufreq/mt8173-cpufreq.c |  152 ++++++++++++++++++++++++++++++++++++--
 1 file changed, 144 insertions(+), 8 deletions(-)

diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
index 49caed2..23c19c5 100644
--- a/drivers/cpufreq/mt8173-cpufreq.c
+++ b/drivers/cpufreq/mt8173-cpufreq.c
@@ -29,6 +29,16 @@
 #define MAX_VOLT_LIMIT		(1150000)
 #define VOLT_TOL		(10000)
 
+struct mtk_cpu_static_power {
+	unsigned long voltage;
+	unsigned int power;
+};
+
+static struct mtk_cpu_static_power *mtk_ca53_static_power_table;
+static struct mtk_cpu_static_power *mtk_ca57_static_power_table;
+static int mtk_ca53_static_table_length;
+static int mtk_ca57_static_table_length;
+
 /*
  * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS
  * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in
@@ -51,6 +61,110 @@ struct mtk_cpu_dvfs_info {
 	bool need_voltage_tracking;
 };
 
+unsigned int mtk_cpufreq_lookup_power(const struct mtk_cpu_static_power *table,
+		unsigned int count, unsigned long voltage)
+{
+	int i;
+
+	for (i = 0; i < count; i++) {
+		if (voltage <= table[i].voltage)
+			return table[i].power;
+	}
+
+	return table[count - 1].power;
+}
+
+int mtk_cpufreq_get_static(cpumask_t *cpumask, int interval,
+		unsigned long voltage, u32 *power)
+{
+	int nr_cpus = cpumask_weight(cpumask);
+
+	*power = 0;
+
+	if (nr_cpus) {
+		if (cpumask_test_cpu(0, cpumask))
+			*power += mtk_cpufreq_lookup_power(
+					mtk_ca53_static_power_table,
+					mtk_ca53_static_table_length,
+					voltage);
+
+		if (cpumask_test_cpu(2, cpumask))
+			*power += mtk_cpufreq_lookup_power(
+					mtk_ca57_static_power_table,
+					mtk_ca57_static_table_length,
+					voltage);
+	}
+
+	return 0;
+}
+
+unsigned int mtk_get_power_table_info(struct cpufreq_policy *policy,
+		struct device_node *np, const char *node_name)
+{
+	int mtk_static_table_length;
+	const struct property *prop;
+	struct mtk_cpu_dvfs_info *info = policy->driver_data;
+	struct device *cpu_dev = info->cpu_dev;
+	const __be32 *val;
+	int nr, i;
+
+	prop = of_find_property(np, node_name, NULL);
+
+	if (!prop) {
+		pr_err("failed to get static-power-points\n");
+		return -ENODEV;
+	}
+
+	if (!prop->value) {
+		pr_err("failed to get static power array data\n");
+		return -EINVAL;
+	}
+
+	nr = prop->length / sizeof(u32);
+
+	if (nr % 2) {
+		pr_err("Invalid OPP list\n");
+		return -EINVAL;
+	}
+
+	mtk_static_table_length = nr / 2;
+
+	if (cpumask_test_cpu(0, policy->related_cpus)) {
+		mtk_ca53_static_table_length = mtk_static_table_length;
+		mtk_ca53_static_power_table = devm_kcalloc(cpu_dev,
+					mtk_static_table_length,
+					sizeof(*mtk_ca53_static_power_table),
+					GFP_KERNEL);
+
+		val = prop->value;
+		for (i = 0; i < mtk_static_table_length; ++i) {
+			unsigned long voltage = be32_to_cpup(val++);
+			unsigned int power = be32_to_cpup(val++);
+
+			mtk_ca53_static_power_table[i].voltage = voltage;
+			mtk_ca53_static_power_table[i].power = power;
+			pr_info("volt:%ld uv, power:%d mW\n", voltage, power);
+		}
+	} else {
+                mtk_ca57_static_table_length = mtk_static_table_length;
+		mtk_ca57_static_power_table = devm_kcalloc(cpu_dev,
+					mtk_static_table_length,
+					sizeof(*mtk_ca57_static_power_table),
+					GFP_KERNEL);
+		val = prop->value;
+		for (i = 0; i < mtk_static_table_length; ++i) {
+			unsigned long voltage = be32_to_cpup(val++);
+			unsigned int power = be32_to_cpup(val++);
+
+			mtk_ca57_static_power_table[i].voltage = voltage;
+			mtk_ca57_static_power_table[i].power = power;
+			pr_info("volt:%ld uv, power:%d mW\n", voltage, power);
+		}
+	}
+
+	return	0;
+}
+
 static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info,
 					int new_vproc)
 {
@@ -267,20 +381,40 @@ static void mtk_cpufreq_ready(struct cpufreq_policy *policy)
 {
 	struct mtk_cpu_dvfs_info *info = policy->driver_data;
 	struct device_node *np = of_node_get(info->cpu_dev->of_node);
+	u32 capacitance;
+	int ret;
 
 	if (WARN_ON(!np))
 		return;
 
 	if (of_find_property(np, "#cooling-cells", NULL)) {
-		info->cdev = of_cpufreq_cooling_register(np,
-							 policy->related_cpus);
 
-		if (IS_ERR(info->cdev)) {
-			dev_err(info->cpu_dev,
-				"running cpufreq without cooling device: %ld\n",
-				PTR_ERR(info->cdev));
+		if (!info->cdev) {
+
+			of_property_read_u32(np,
+					"dynamic-power-coefficient",
+					&capacitance);
+
+			ret = mtk_get_power_table_info(policy, np,
+						"static-power-points");
+			if (ret) {
+                                dev_err(info->cpu_dev,
+                                        "cpufreq without static-points: %d\n",
+                                        ret);
+			}
+
+			info->cdev = of_cpufreq_power_cooling_register(np,
+				policy->related_cpus,
+				capacitance,
+				mtk_cpufreq_get_static);
+
+			if (IS_ERR(info->cdev)) {
+				dev_err(info->cpu_dev,
+					"cpufreq without cdev: %ld\n",
+					PTR_ERR(info->cdev));
+					info->cdev = NULL;
+			}
 
-			info->cdev = NULL;
 		}
 	}
 
@@ -460,7 +594,9 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
 {
 	struct mtk_cpu_dvfs_info *info = policy->driver_data;
 
-	cpufreq_cooling_unregister(info->cdev);
+	if (info->cdev)
+		cpufreq_cooling_unregister(info->cdev);
+
 	dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table);
 	mtk_cpu_dvfs_info_release(info);
 	kfree(info);
-- 
1.7.9.5

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#1258273

FromViresh Kumar <viresh.kumar@linaro.org>
Date2015-10-28 16:50 +0100
Message-ID<qoB99-4v0-37@gated-at.bofh.it>
In reply to#1253739
On 22-10-15, 20:02, Dawei Chien wrote:
> Use Intelligent Power Allocation (IPA) technical to add static/dynamic power model for binding CPU thermal zone.
> The power allocator governor allocates power budget to control CPU temperature.
> 
> Power Allocator governor is able to keep SOC temperature within a defined temperature range to avoid SOC overheat and keep it's performance. mt8173-cpufreq.c need to register its' own power model with power allocator thermal governor, so that power allocator governor can allocates suitable power budget to control CPU temperature.
> 
> PATCH1 is base on
> https://patchwork.kernel.org/patch/7034601/
> 
> PATCH2 is base on Sascha's thermal driver V9
> https://patchwork.kernel.org/patch/7249821/
> https://patchwork.kernel.org/patch/7249861/
> https://patchwork.kernel.org/patch/7249891/
> 
> Change since V1:
> include mt8171.h and sort header file for mt8173.dtsi
> 
> Change since V2:
> Move dynamic/static power model in device tree
> 
> Dawei.Chien (2):
>   thermal: mediatek: Add cpu power cooling model.
>   arm64: dts: mt8173: Add thermal zone node for mt8173.

Sorry for being extremely late in reviewing this stuff. You are
already on v3 and I haven't reviewed it once. Mostly due to bad timing
of my holidays and other work pressure.

Now, there are few things that I feel are not properly addressed here,
and I may be wrong:
- Where are the bindings for static-power-points and
  dynamic-power-coefficient. Sorry I failed to see them in this or
  other series you mentioned.
- Even then, why should we be adding another table into DT for
  voltage/power ? And not reuse and extend the opp-v2 stuff which is
  already mainlined now.
- There are few issues with the code as well, but I want to see where
  the bindings should go first. And then only discuss the code
  further.

-- 
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