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[RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document

Started byCaesar Wang <wxt@rock-chips.com>
First post2015-10-22 04:40 +0200
Last post2015-10-22 06:00 +0200
Articles 3 — 3 participants

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  [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document Caesar Wang <wxt@rock-chips.com> - 2015-10-22 04:40 +0200
    Re: [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the  "init" pinctrl in this document Doug Anderson <dianders@chromium.org> - 2015-10-22 05:50 +0200
      Re: [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the  "init" pinctrl in this document Caesar Wang <caesar.upstream@gmail.com> - 2015-10-22 06:00 +0200

#1253438 — [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document

FromCaesar Wang <wxt@rock-chips.com>
Date2015-10-22 04:40 +0200
Subject[RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document
Message-ID<qmdXj-5wS-5@gated-at.bofh.it>
The "init" pinctrl is defined we'll set
pinctrl to this state before probe and then "default" after probe.

Add the "init" pinctrl as the OTP gpio state, since we need switch
the pin to gpio state before the TSADC controller is reset.

As I know, the TSADC controller is reset, the tshut polarity will be
a *low* signal in a short period of time for some devices.

Says:
The TSADC get the temperature on rockchip thermal.

If T(current temperature) < (setting temperature), the OTP output the
*high* signal.
If T(current temperature) > (setting temperature), the OTP output the
*low* Signal.

In some cases, the OTP pin is connected to the PMIC, maybe the
PMIC can accept the reset response time to avoid this issue.

In other words, the system will be always reboot if we make the
OTP pin is connected the others IC to control the power.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
---

Changes in v2:
  - Add the 'init' pinctrl more decription in commit.
  - Fix the subject to make more obvious in PATCH[1/2]
  - Resend this patch v2 since fix the subject to be specific.

Changes in v1:
  - As the Doug comments, add the 'init' property to sync document.

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index ef802de..28e84f7 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -27,8 +27,9 @@ tsadc: tsadc@ff280000 {
 	clock-names = "tsadc", "apb_pclk";
 	resets = <&cru SRST_TSADC>;
 	reset-names = "tsadc-apb";
-	pinctrl-names = "default";
-	pinctrl-0 = <&otp_out>;
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&otp_gpio>;
+	pinctrl-1 = <&otp_out>;
 	#thermal-sensor-cells = <1>;
 	rockchip,hw-tshut-temp = <95000>;
 	rockchip,hw-tshut-mode = <0>;
-- 
1.9.1

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#1253459 — Re: [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document

FromDoug Anderson <dianders@chromium.org>
Date2015-10-22 05:50 +0200
SubjectRe: [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document
Message-ID<qmf33-76A-3@gated-at.bofh.it>
In reply to#1253438
Caesar,

On Wed, Oct 21, 2015 at 7:30 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> The "init" pinctrl is defined we'll set
> pinctrl to this state before probe and then "default" after probe.
>
> Add the "init" pinctrl as the OTP gpio state, since we need switch
> the pin to gpio state before the TSADC controller is reset.
>
> As I know, the TSADC controller is reset, the tshut polarity will be
> a *low* signal in a short period of time for some devices.
>
> Says:
> The TSADC get the temperature on rockchip thermal.
>
> If T(current temperature) < (setting temperature), the OTP output the
> *high* signal.
> If T(current temperature) > (setting temperature), the OTP output the
> *low* Signal.
>
> In some cases, the OTP pin is connected to the PMIC, maybe the
> PMIC can accept the reset response time to avoid this issue.
>
> In other words, the system will be always reboot if we make the
> OTP pin is connected the others IC to control the power.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> ---
>
> Changes in v2:
>   - Add the 'init' pinctrl more decription in commit.
>   - Fix the subject to make more obvious in PATCH[1/2]
>   - Resend this patch v2 since fix the subject to be specific.
>
> Changes in v1:
>   - As the Doug comments, add the 'init' property to sync document.
>
>  Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> index ef802de..28e84f7 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt

I think Rob wanted something more in the "rockchip-thermal.txt"
document itself.  Like:

Pinctrl states:
- During device probe a driver may glitch the output line.  If this is
not acceptable for your board, you can use the standard "init" and
"default" pinctrl states.  The "init" state will be set before device
probe and "default" after.
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#1253462 — Re: [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document

FromCaesar Wang <caesar.upstream@gmail.com>
Date2015-10-22 06:00 +0200
SubjectRe: [RESEND PATCH v2 1/2] dt-bindings: rockchip-thermal: Add the "init" pinctrl in this document
Message-ID<qmfcK-7hJ-7@gated-at.bofh.it>
In reply to#1253459

在 2015年10月22日 11:45, Doug Anderson 写道:
> Caesar,
>
> On Wed, Oct 21, 2015 at 7:30 PM, Caesar Wang <wxt@rock-chips.com> wrote:
>> The "init" pinctrl is defined we'll set
>> pinctrl to this state before probe and then "default" after probe.
>>
>> Add the "init" pinctrl as the OTP gpio state, since we need switch
>> the pin to gpio state before the TSADC controller is reset.
>>
>> As I know, the TSADC controller is reset, the tshut polarity will be
>> a *low* signal in a short period of time for some devices.
>>
>> Says:
>> The TSADC get the temperature on rockchip thermal.
>>
>> If T(current temperature) < (setting temperature), the OTP output the
>> *high* signal.
>> If T(current temperature) > (setting temperature), the OTP output the
>> *low* Signal.
>>
>> In some cases, the OTP pin is connected to the PMIC, maybe the
>> PMIC can accept the reset response time to avoid this issue.
>>
>> In other words, the system will be always reboot if we make the
>> OTP pin is connected the others IC to control the power.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> Reviewed-by: Douglas Anderson <dianders@chromium.org>
>> ---
>>
>> Changes in v2:
>>    - Add the 'init' pinctrl more decription in commit.
>>    - Fix the subject to make more obvious in PATCH[1/2]
>>    - Resend this patch v2 since fix the subject to be specific.
>>
>> Changes in v1:
>>    - As the Doug comments, add the 'init' property to sync document.
>>
>>   Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> index ef802de..28e84f7 100644
>> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
> I think Rob wanted something more in the "rockchip-thermal.txt"
> document itself.  Like:
>
> Pinctrl states:
> - During device probe a driver may glitch the output line.  If this is
> not acceptable for your board, you can use the standard "init" and
> "default" pinctrl states.  The "init" state will be set before device
> probe and "default" after.

Sound resonable.
Thanks Doug to explain!

>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip


-- 
Thanks,
Caesar

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