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| Started by | Chen Feng <puck.chen@hisilicon.com> |
|---|---|
| First post | 2015-10-20 11:10 +0200 |
| Last post | 2015-10-22 03:20 +0200 |
| Articles | 4 — 4 participants |
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[PATCH V2 1/3] Documentation for system mmu in hi6220 platform. Chen Feng <puck.chen@hisilicon.com> - 2015-10-20 11:10 +0200
Re: [PATCH V2 1/3] Documentation for system mmu in hi6220 platform. Mark Rutland <mark.rutland@arm.com> - 2015-10-20 12:40 +0200
Re: [PATCH V2 1/3] Documentation for system mmu in hi6220 platform. chenfeng <puck.chen@hisilicon.com> - 2015-10-20 14:40 +0200
Re: [PATCH V2 1/3] Documentation for system mmu in hi6220 platform. Rob Herring <robh+dt@kernel.org> - 2015-10-22 03:20 +0200
| From | Chen Feng <puck.chen@hisilicon.com> |
|---|---|
| Date | 2015-10-20 11:10 +0200 |
| Subject | [PATCH V2 1/3] Documentation for system mmu in hi6220 platform. |
| Message-ID | <qlAMj-6Wk-45@gated-at.bofh.it> |
docs: iommu: Documentation for smmu in hi6220 SoC.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Yu Dongbin <yudongbin@hisilicon.com>
---
.../bindings/iommu/hisi,hi6220-iommu.txt | 52 ++++++++++++++++++++++
1 file changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
new file mode 100644
index 0000000..93e0701
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
@@ -0,0 +1,52 @@
+Hi6220 SoC SMMU Device Driver devicetree document
+=======================================================================
+The Architecture of SMMU on Hi6220 SoC:
+
+ +------------------------------------------------------------------+
+ | |
+ | +---------+ +--------+ +-------------+ +-------+ |
+ | | ADE | | ISP | | V/J codec | | G3D | |
+ | +----|----+ +---|----+ +------|------+ +---|---| |
+ | | | | | |
+ | ---------v-----------v--------------v--------------v----- |
+ | Media Bus |
+ | --------------------------------|---------------|-------- |
+ | | | |
+ | +---v---------------v--------+ |
+ | | SMMU | |
+ | +----------|---------|-------+ |
+ | | | |
+ +--------------------------------------------|---------|-----------+
+ | |
+ +------------v---------v-----------+
+ | DDRC |
+ +----------------------------------+
+
+Note:
+The media system shared the same smmu IP. to access DDR memory. And all
+media IP used the same page table.
+
+Below binding describes the system mmu for media system in hi6220 platform
+
+Required properties:
+- compatible: Should be "hisilicon,hi6220-smmu" example:
+ compatible = "hisilicon,hi6220-smmu";
+- reg: A tuple of base address and size of System MMU registers.
+- interrupts: An interrupt specifier for interrupt signal of System MMU.
+- clocks: The clock used for smmu IP.
+- clock-names: The name to enable clock with clock framework.
+- #iommu-cells: The iommu-cells should be 1 for muti-master to use.
+
+Examples:
+ smmu@f4210000 {
+ compatible = "hisilicon,hi6220-smmu";
+ reg = <0x0 0xf4210000 0x0 0x1000>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sys_ctrl HI6220_MMU_CLK>,
+ <&media_ctrl HI6220_MED_MMU>,
+ <&sys_ctrl HI6220_MEDIA_PLL_SRC>;
+ clock-names = "smmu_clk",
+ "media_sc_clk",
+ "smmu_peri_clk";
+ #iommu-cells = <1>;
+ };
--
1.9.1
--
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| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Date | 2015-10-20 12:40 +0200 |
| Message-ID | <qlCuK-13U-17@gated-at.bofh.it> |
| In reply to | #1251470 |
On Tue, Oct 20, 2015 at 04:45:22PM +0800, Chen Feng wrote:
> docs: iommu: Documentation for smmu in hi6220 SoC.
>
> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
> Signed-off-by: Yu Dongbin <yudongbin@hisilicon.com>
> ---
> .../bindings/iommu/hisi,hi6220-iommu.txt | 52 ++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
>
> diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
> new file mode 100644
> index 0000000..93e0701
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
> @@ -0,0 +1,52 @@
> +Hi6220 SoC SMMU Device Driver devicetree document
> +=======================================================================
> +The Architecture of SMMU on Hi6220 SoC:
> +
> + +------------------------------------------------------------------+
> + | |
> + | +---------+ +--------+ +-------------+ +-------+ |
> + | | ADE | | ISP | | V/J codec | | G3D | |
> + | +----|----+ +---|----+ +------|------+ +---|---| |
> + | | | | | |
> + | ---------v-----------v--------------v--------------v----- |
> + | Media Bus |
> + | --------------------------------|---------------|-------- |
> + | | | |
> + | +---v---------------v--------+ |
> + | | SMMU | |
> + | +----------|---------|-------+ |
> + | | | |
> + +--------------------------------------------|---------|-----------+
> + | |
> + +------------v---------v-----------+
> + | DDRC |
> + +----------------------------------+
> +
> +Note:
> +The media system shared the same smmu IP. to access DDR memory. And all
Nit: s/IP./IP/
> +media IP used the same page table.
> +
> +Below binding describes the system mmu for media system in hi6220 platform
> +
> +Required properties:
> +- compatible: Should be "hisilicon,hi6220-smmu" example:
> + compatible = "hisilicon,hi6220-smmu";
No need for the example here.
Just say:
- compatible: should contain "hisilicon,hi6220-smmu".
> +- reg: A tuple of base address and size of System MMU registers.
> +- interrupts: An interrupt specifier for interrupt signal of System MMU.
> +- clocks: The clock used for smmu IP.
> +- clock-names: The name to enable clock with clock framework.
The description of clocks and clock-names makes no sense.
You must define the exact set of names you expect, and the relationship
between clocks and clock names. e.g.
- clocks: a list of phandle + clock-specifier pairs, one for each entry
in clock-names
- clock-names: should contain:
* "smmu_clk"
* "media_sc_clk"
* "smmu_peri_clk"
> +- #iommu-cells: The iommu-cells should be 1 for muti-master to use.
s/muti/multi/
You must define what that one cell corresponds to in the hardware.
Thanks,
Mark.
> +
> +Examples:
> + smmu@f4210000 {
> + compatible = "hisilicon,hi6220-smmu";
> + reg = <0x0 0xf4210000 0x0 0x1000>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&sys_ctrl HI6220_MMU_CLK>,
> + <&media_ctrl HI6220_MED_MMU>,
> + <&sys_ctrl HI6220_MEDIA_PLL_SRC>;
> + clock-names = "smmu_clk",
> + "media_sc_clk",
> + "smmu_peri_clk";
> + #iommu-cells = <1>;
> + };
> --
> 1.9.1
>
--
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| From | chenfeng <puck.chen@hisilicon.com> |
|---|---|
| Date | 2015-10-20 14:40 +0200 |
| Message-ID | <qlEmR-3NZ-3@gated-at.bofh.it> |
| In reply to | #1251572 |
Mark, thanks very much.
On 2015/10/20 18:34, Mark Rutland wrote:
> On Tue, Oct 20, 2015 at 04:45:22PM +0800, Chen Feng wrote:
>> docs: iommu: Documentation for smmu in hi6220 SoC.
>>
>> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
>> Signed-off-by: Yu Dongbin <yudongbin@hisilicon.com>
>> ---
>> .../bindings/iommu/hisi,hi6220-iommu.txt | 52 ++++++++++++++++++++++
>> 1 file changed, 52 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
>> new file mode 100644
>> index 0000000..93e0701
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
>> @@ -0,0 +1,52 @@
>> +Hi6220 SoC SMMU Device Driver devicetree document
>> +=======================================================================
>> +The Architecture of SMMU on Hi6220 SoC:
>> +
>> + +------------------------------------------------------------------+
>> + | |
>> + | +---------+ +--------+ +-------------+ +-------+ |
>> + | | ADE | | ISP | | V/J codec | | G3D | |
>> + | +----|----+ +---|----+ +------|------+ +---|---| |
>> + | | | | | |
>> + | ---------v-----------v--------------v--------------v----- |
>> + | Media Bus |
>> + | --------------------------------|---------------|-------- |
>> + | | | |
>> + | +---v---------------v--------+ |
>> + | | SMMU | |
>> + | +----------|---------|-------+ |
>> + | | | |
>> + +--------------------------------------------|---------|-----------+
>> + | |
>> + +------------v---------v-----------+
>> + | DDRC |
>> + +----------------------------------+
>> +
>> +Note:
>> +The media system shared the same smmu IP. to access DDR memory. And all
>
> Nit: s/IP./IP/
>
>> +media IP used the same page table.
>> +
>> +Below binding describes the system mmu for media system in hi6220 platform
>> +
>> +Required properties:
>> +- compatible: Should be "hisilicon,hi6220-smmu" example:
>> + compatible = "hisilicon,hi6220-smmu";
>
> No need for the example here.
>
> Just say:
>
> - compatible: should contain "hisilicon,hi6220-smmu".
>
ok,
>> +- reg: A tuple of base address and size of System MMU registers.
>> +- interrupts: An interrupt specifier for interrupt signal of System MMU.
>> +- clocks: The clock used for smmu IP.
>> +- clock-names: The name to enable clock with clock framework.
>
> The description of clocks and clock-names makes no sense.
>
> You must define the exact set of names you expect, and the relationship
> between clocks and clock names. e.g.
>
ok
> - clocks: a list of phandle + clock-specifier pairs, one for each entry
> in clock-names
>
> - clock-names: should contain:
> * "smmu_clk"
> * "media_sc_clk"
> * "smmu_peri_clk"
>
>> +- #iommu-cells: The iommu-cells should be 1 for muti-master to use.
>
> s/muti/multi/
>
> You must define what that one cell corresponds to in the hardware.
>
> Thanks,
> Mark.
>
I will change this next version.
>> +
>> +Examples:
>> + smmu@f4210000 {
>> + compatible = "hisilicon,hi6220-smmu";
>> + reg = <0x0 0xf4210000 0x0 0x1000>;
>> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&sys_ctrl HI6220_MMU_CLK>,
>> + <&media_ctrl HI6220_MED_MMU>,
>> + <&sys_ctrl HI6220_MEDIA_PLL_SRC>;
>> + clock-names = "smmu_clk",
>> + "media_sc_clk",
>> + "smmu_peri_clk";
>> + #iommu-cells = <1>;
>> + };
>> --
>> 1.9.1
>>
>
> .
>
--
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| From | Rob Herring <robh+dt@kernel.org> |
|---|---|
| Date | 2015-10-22 03:20 +0200 |
| Message-ID | <qmcHU-3Ao-11@gated-at.bofh.it> |
| In reply to | #1251470 |
On Tue, Oct 20, 2015 at 3:45 AM, Chen Feng <puck.chen@hisilicon.com> wrote:
> docs: iommu: Documentation for smmu in hi6220 SoC.
>
> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
> Signed-off-by: Yu Dongbin <yudongbin@hisilicon.com>
> ---
> .../bindings/iommu/hisi,hi6220-iommu.txt | 52 ++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
>
> diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
> new file mode 100644
> index 0000000..93e0701
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
> @@ -0,0 +1,52 @@
> +Hi6220 SoC SMMU Device Driver devicetree document
> +=======================================================================
> +The Architecture of SMMU on Hi6220 SoC:
> +
> + +------------------------------------------------------------------+
> + | |
> + | +---------+ +--------+ +-------------+ +-------+ |
> + | | ADE | | ISP | | V/J codec | | G3D | |
> + | +----|----+ +---|----+ +------|------+ +---|---| |
> + | | | | | |
> + | ---------v-----------v--------------v--------------v----- |
> + | Media Bus |
> + | --------------------------------|---------------|-------- |
> + | | | |
> + | +---v---------------v--------+ |
> + | | SMMU | |
> + | +----------|---------|-------+ |
> + | | | |
> + +--------------------------------------------|---------|-----------+
> + | |
> + +------------v---------v-----------+
> + | DDRC |
> + +----------------------------------+
Nice diagram.
> +
> +Note:
> +The media system shared the same smmu IP. to access DDR memory. And all
> +media IP used the same page table.
> +
> +Below binding describes the system mmu for media system in hi6220 platform
> +
> +Required properties:
> +- compatible: Should be "hisilicon,hi6220-smmu" example:
> + compatible = "hisilicon,hi6220-smmu";
> +- reg: A tuple of base address and size of System MMU registers.
> +- interrupts: An interrupt specifier for interrupt signal of System MMU.
> +- clocks: The clock used for smmu IP.
> +- clock-names: The name to enable clock with clock framework.
> +- #iommu-cells: The iommu-cells should be 1 for muti-master to use.
> +
> +Examples:
> + smmu@f4210000 {
node name should be iommu.
> + compatible = "hisilicon,hi6220-smmu";
> + reg = <0x0 0xf4210000 0x0 0x1000>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&sys_ctrl HI6220_MMU_CLK>,
> + <&media_ctrl HI6220_MED_MMU>,
> + <&sys_ctrl HI6220_MEDIA_PLL_SRC>;
> + clock-names = "smmu_clk",
> + "media_sc_clk",
> + "smmu_peri_clk";
> + #iommu-cells = <1>;
> + };
> --
> 1.9.1
>
--
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