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[PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.

Started byMoritz Fischer <moritz.fischer@ettus.com>
First post2015-10-17 00:50 +0200
Last post2015-10-17 00:50 +0200
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  [PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform. Moritz Fischer <moritz.fischer@ettus.com> - 2015-10-17 00:50 +0200

#1249203 — [PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.

FromMoritz Fischer <moritz.fischer@ettus.com>
Date2015-10-17 00:50 +0200
Subject[PATCHv2 2/3] ARM: zynq: dt: Updated devicetree for Zynq 7000 platform.
Message-ID<qklZ0-3t5-25@gated-at.bofh.it>
Added addtional nodes required for FPGA Manager operation
of the Xilinx Zynq Devc configuration interface.

Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
---

v2: No changes

---
 arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index dc0457e..1a5220e 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -294,6 +294,11 @@
 		devcfg: devcfg@f8007000 {
 			compatible = "xlnx,zynq-devcfg-1.0";
 			reg = <0xf8007000 0x100>;
+			interrupt-parent = <&intc>;
+			interrupts = <0 8 4>;
+			clocks = <&clkc 12>;
+			clock-names = "ref_clk";
+			syscon = <&slcr>;
 		};
 
 		global_timer: timer@f8f00200 {
-- 
2.4.3

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