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| Started by | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| First post | 2015-10-17 19:30 +0200 |
| Last post | 2015-10-17 19:30 +0200 |
| Articles | 6 — 1 participant |
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[PATCH v2 0/9] Add STM32 pinctrl/GPIO driver Maxime Coquelin <mcoquelin.stm32@gmail.com> - 2015-10-17 19:30 +0200
[PATCH v2 7/9] ARM: dts: Add USART1 pin config to STM32F429 boards Maxime Coquelin <mcoquelin.stm32@gmail.com> - 2015-10-17 19:30 +0200
[PATCH v2 9/9] ARM: config: Enable GPIO Led driver in stm32_defconfig Maxime Coquelin <mcoquelin.stm32@gmail.com> - 2015-10-17 19:30 +0200
[PATCH v2 8/9] ARM: dts: Add leds support to STM32F429 Discovery board Maxime Coquelin <mcoquelin.stm32@gmail.com> - 2015-10-17 19:30 +0200
[PATCH v2 6/9] ARM: dts: Add pinctrl node to STM32F429 Maxime Coquelin <mcoquelin.stm32@gmail.com> - 2015-10-17 19:30 +0200
[PATCH v2 2/9] Documentation: dt-bindings: Document STM32 pinctrl driver DT bindings Maxime Coquelin <mcoquelin.stm32@gmail.com> - 2015-10-17 19:30 +0200
| From | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| Date | 2015-10-17 19:30 +0200 |
| Subject | [PATCH v2 0/9] Add STM32 pinctrl/GPIO driver |
| Message-ID | <qkDsR-4cT-7@gated-at.bofh.it> |
Hi Linus, all, This is the second round of STM32 pinctrl series, which improves DT bindings declaration and documentation, and also fixes some commit fixup issues. The series also contains two more patches, adding GPIO LEDs support as a user of this driver. The STM32 family has 16 pins per GPIO bank, and the number of bank varies depending on the model. Pins can be multiplexed either in GPIO mode, alternate function (up to 15 functions per pin) or analog (for ADC/DAC). Changes since v1: ----------------- - Add GPIO LEDs support in DT and defconfig - Changes pinmux DT bindings from macros to raw values (Daniel) - Improve DT bindings documentation (Daniel) - Fix some commit fixup and rebase issues. Kind regards, Maxime Maxime Coquelin (9): ARM: Kconfig: Introduce MACH_STM32F429 flag Documentation: dt-bindings: Document STM32 pinctrl driver DT bindings includes: dt-bindings: Add STM32F429 pinctrl DT bindings pinctrl: Add support STM32 MCUs ARM: mach-stm32: Select pinctrl ARM: dts: Add pinctrl node to STM32F429 ARM: dts: Add USART1 pin config to STM32F429 boards ARM: dts: Add leds support to STM32F429 Discovery board ARM: config: Enable GPIO Led driver in stm32_defconfig .../bindings/pinctrl/st,stm32-pinctrl.txt | 126 ++ arch/arm/Kconfig | 6 + arch/arm/boot/dts/stm32429i-eval.dts | 2 + arch/arm/boot/dts/stm32f429-disco.dts | 12 + arch/arm/boot/dts/stm32f429.dtsi | 110 ++ arch/arm/configs/stm32_defconfig | 1 + drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/stm32/Kconfig | 16 + drivers/pinctrl/stm32/Makefile | 5 + drivers/pinctrl/stm32/pinctrl-stm32.c | 856 +++++++++++ drivers/pinctrl/stm32/pinctrl-stm32.h | 43 + drivers/pinctrl/stm32/pinctrl-stm32f429.c | 1598 ++++++++++++++++++++ include/dt-bindings/pinctrl/pinctrl-stm32.h | 12 + include/dt-bindings/pinctrl/stm32f429-pinfunc.h | 1241 +++++++++++++++ 15 files changed, 4030 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt create mode 100644 drivers/pinctrl/stm32/Kconfig create mode 100644 drivers/pinctrl/stm32/Makefile create mode 100644 drivers/pinctrl/stm32/pinctrl-stm32.c create mode 100644 drivers/pinctrl/stm32/pinctrl-stm32.h create mode 100644 drivers/pinctrl/stm32/pinctrl-stm32f429.c create mode 100644 include/dt-bindings/pinctrl/pinctrl-stm32.h create mode 100644 include/dt-bindings/pinctrl/stm32f429-pinfunc.h -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| Date | 2015-10-17 19:30 +0200 |
| Subject | [PATCH v2 7/9] ARM: dts: Add USART1 pin config to STM32F429 boards |
| Message-ID | <qkDsS-4cT-23@gated-at.bofh.it> |
| In reply to | #1249381 |
This patch selects USART1 pin configuration on PA9/PA10 pins
for both Eval and Disco boards.
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
---
arch/arm/boot/dts/stm32429i-eval.dts | 2 ++
arch/arm/boot/dts/stm32f429-disco.dts | 2 ++
arch/arm/boot/dts/stm32f429.dtsi | 13 +++++++++++++
3 files changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts
index 6964fc9..71fe17a 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -71,5 +71,7 @@
};
&usart1 {
+ pinctrl-0 = <&usart1_pins_a>;
+ pinctrl-names = "default";
status = "okay";
};
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts
index f0b731d..e3ce796 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -71,5 +71,7 @@
};
&usart1 {
+ pinctrl-0 = <&usart1_pins_a>;
+ pinctrl-names = "default";
status = "okay";
};
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 9e6e75c..eb3580e 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -263,6 +263,19 @@
clocks = <&rcc 0 266>;
st,bank-name = "GPIOK";
};
+
+ usart1_pins_a: usart1@0 {
+ pins1 {
+ pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
+ bias-disable;
+ };
+ };
};
rcc: rcc@40023810 {
--
1.9.1
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| From | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| Date | 2015-10-17 19:30 +0200 |
| Subject | [PATCH v2 9/9] ARM: config: Enable GPIO Led driver in stm32_defconfig |
| Message-ID | <qkDsS-4cT-39@gated-at.bofh.it> |
| In reply to | #1249381 |
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> --- arch/arm/configs/stm32_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig index 4725fab..92ade2e 100644 --- a/arch/arm/configs/stm32_defconfig +++ b/arch/arm/configs/stm32_defconfig @@ -52,6 +52,7 @@ CONFIG_SERIAL_STM32_CONSOLE=y # CONFIG_USB_SUPPORT is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_FILE_LOCKING is not set -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| Date | 2015-10-17 19:30 +0200 |
| Subject | [PATCH v2 8/9] ARM: dts: Add leds support to STM32F429 Discovery board |
| Message-ID | <qkDsT-4cT-53@gated-at.bofh.it> |
| In reply to | #1249381 |
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
---
arch/arm/boot/dts/stm32f429-disco.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts
index e3ce796..532c499 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -64,6 +64,16 @@
aliases {
serial0 = &usart1;
};
+
+ leds {
+ compatible = "gpio-leds";
+ red {
+ gpios = <&gpiog 14 0>;
+ };
+ green {
+ gpios = <&gpiog 13 0>;
+ };
+ };
};
&clk_hse {
--
1.9.1
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| From | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| Date | 2015-10-17 19:30 +0200 |
| Subject | [PATCH v2 6/9] ARM: dts: Add pinctrl node to STM32F429 |
| Message-ID | <qkDsT-4cT-55@gated-at.bofh.it> |
| In reply to | #1249381 |
The STM32F429 MCU has 11 GPIO banks, with 16 pins per bank.
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
---
arch/arm/boot/dts/stm32f429.dtsi | 97 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d78a481..9e6e75c 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -46,6 +46,7 @@
*/
#include "armv7-m.dtsi"
+#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
/ {
clocks {
@@ -168,6 +169,102 @@
status = "disabled";
};
+ pin-controller {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,stm32f429-pinctrl";
+ ranges = <0 0x40020000 0x3000>;
+ pins-are-numbered;
+
+ gpioa: gpio@40020000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x0 0x400>;
+ clocks = <&rcc 0 256>;
+ st,bank-name = "GPIOA";
+ };
+
+ gpiob: gpio@40020400 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x400 0x400>;
+ clocks = <&rcc 0 257>;
+ st,bank-name = "GPIOB";
+ };
+
+ gpioc: gpio@40020800 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x800 0x400>;
+ clocks = <&rcc 0 258>;
+ st,bank-name = "GPIOC";
+ };
+
+ gpiod: gpio@40020c00 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0xc00 0x400>;
+ clocks = <&rcc 0 259>;
+ st,bank-name = "GPIOD";
+ };
+
+ gpioe: gpio@40021000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x1000 0x400>;
+ clocks = <&rcc 0 260>;
+ st,bank-name = "GPIOE";
+ };
+
+ gpiof: gpio@40021400 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x1400 0x400>;
+ clocks = <&rcc 0 261>;
+ st,bank-name = "GPIOF";
+ };
+
+ gpiog: gpio@40021800 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x1800 0x400>;
+ clocks = <&rcc 0 262>;
+ st,bank-name = "GPIOG";
+ };
+
+ gpioh: gpio@40021c00 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x1c00 0x400>;
+ clocks = <&rcc 0 263>;
+ st,bank-name = "GPIOH";
+ };
+
+ gpioi: gpio@40022000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x2000 0x400>;
+ clocks = <&rcc 0 264>;
+ st,bank-name = "GPIOI";
+ };
+
+ gpioj: gpio@40022400 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x2400 0x400>;
+ clocks = <&rcc 0 265>;
+ st,bank-name = "GPIOJ";
+ };
+
+ gpiok: gpio@40022800 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x2800 0x400>;
+ clocks = <&rcc 0 266>;
+ st,bank-name = "GPIOK";
+ };
+ };
+
rcc: rcc@40023810 {
#clock-cells = <2>;
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
--
1.9.1
--
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| From | Maxime Coquelin <mcoquelin.stm32@gmail.com> |
|---|---|
| Date | 2015-10-17 19:30 +0200 |
| Subject | [PATCH v2 2/9] Documentation: dt-bindings: Document STM32 pinctrl driver DT bindings |
| Message-ID | <qkDsT-4cT-59@gated-at.bofh.it> |
| In reply to | #1249381 |
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
---
.../bindings/pinctrl/st,stm32-pinctrl.txt | 126 +++++++++++++++++++++
1 file changed, 126 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
new file mode 100644
index 0000000..7b4800c
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -0,0 +1,126 @@
+* STM32 GPIO and Pin Mux/Config controller
+
+STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
+controller. It controls the input/output settings on the available pins and
+also provides ability to multiplex and configure the output of various on-chip
+controllers onto these pads.
+
+Pin controller node:
+Required properies:
+ - compatible: value should be one of the following:
+ (a) "st,stm32f429-pinctrl"
+ - #address-cells: The value of this property must be 1
+ - #size-cells : The value of this property must be 1
+ - ranges : defines mapping between pin controller node (parent) to
+ gpio-bank node (children).
+ - pins-are-numbered: Specify the subnodes are using numbered pinmux to
+ specify pins.
+
+GPIO controller/bank node:
+Required properties:
+ - gpio-controller : Indicates this device is a GPIO controller
+ - #gpio-cells : Should be two.
+ The first cell is the pin number
+ The second one is the polarity:
+ - 0 for active high
+ - 1 for active low
+ - reg : The gpio address range, relative to the pinctrl range
+ - clocks : clock that drives this bank
+ - st,bank-name : Should be a name string for this bank as specified in
+ the datasheet
+
+Optional properties:
+ - reset: : Reference to the reset controller
+
+Example:
+#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
+...
+
+ pin-controller {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "st,stm32f429-pinctrl";
+ ranges = <0 0x40020000 0x3000>;
+ pins-are-numbered;
+
+ gpioa: gpio@40020000 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x0 0x400>;
+ resets = <&reset_ahb1 0>;
+ st,bank-name = "GPIOA";
+ };
+ ...
+ pin-functions nodes follow...
+ };
+
+Contents of function subnode node:
+----------------------------------
+Subnode format
+A pinctrl node should contain at least one subnode representing the
+pinctrl group available on the machine. Each subnode will list the
+pins it needs, and how they should be configured, with regard to muxer
+configuration, pullups, drive, output high/low and output speed.
+
+ node {
+ pinmux = <PIN_NUMBER_PINMUX>;
+ GENERIC_PINCONFIG;
+ };
+
+Required properties:
+- pinmux: integer array, represents gpio pin number and mux setting.
+ Supported pin number and mux varies for different SoCs, and are defined in
+ dt-bindings/pinctrl/<soc>-pinfunc.h directly.
+ These defines are calculated as:
+ ((port * 16 + line) << 8) | function
+ With:
+ - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
+ - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
+ - function: The function number, can be:
+ * 0 : GPIO
+ * 1 : Alternate Function 0
+ * 2 : Alternate Function 1
+ * 3 : Alternate Function 2
+ * ...
+ * 16 : Alternate Function 15
+ * 17 : Analog
+
+Optional properties:
+- GENERIC_PINCONFIG: is the generic pinconfig options to use.
+ Available options are:
+ - bias-disable,
+ - bias-pull-down,
+ - bias-pull-up,
+ - drive-push-pull,
+ - drive-open-drain,
+ - output-low
+ - output-high
+ - slew-rate = <x>, with x being:
+ < 0 > : Low speed
+ < 1 > : Medium speed
+ < 2 > : Fast speed
+ < 3 > : High speed
+
+Example:
+
+pin-controller {
+...
+ usart1_pins_a: usart1@0 {
+ pins1 {
+ pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
+ bias-disable;
+ };
+ };
+};
+
+&usart1 {
+ pinctrl-0 = <&usart1_pins_a>;
+ pinctrl-names = "default";
+ status = "okay";
+};
--
1.9.1
--
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