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Groups > linux.kernel > #1245264 > unrolled thread
| Started by | Franklin S Cooper Jr <fcooper@ti.com> |
|---|---|
| First post | 2015-10-13 03:40 +0200 |
| Last post | 2015-10-15 19:20 +0200 |
| Articles | 3 on this page of 23 — 4 participants |
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[PATCH 0/5] mtd: nand: Fix support for NAND DMA Prefetch Franklin S Cooper Jr <fcooper@ti.com> - 2015-10-13 03:40 +0200
[PATCH 3/5] mtd: nand: omap2: Fix high memory dma prefetch transfer Franklin S Cooper Jr <fcooper@ti.com> - 2015-10-13 03:40 +0200
[PATCH 5/5] ARM: OMAP2+: Update gpmc and nand DT binding documentation Franklin S Cooper Jr <fcooper@ti.com> - 2015-10-13 03:40 +0200
Re: [PATCH 5/5] ARM: OMAP2+: Update gpmc and nand DT binding documentation Roger Quadros <rogerq@ti.com> - 2015-10-14 14:00 +0200
Re: [PATCH 5/5] ARM: OMAP2+: Update gpmc and nand DT binding documentation "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-15 19:20 +0200
[PATCH 4/5] ARM: dts: am437x/am33xx/omap3/dm816x: Add gpmc dma channel Franklin S Cooper Jr <fcooper@ti.com> - 2015-10-13 03:40 +0200
Re: [PATCH 4/5] ARM: dts: am437x/am33xx/omap3/dm816x: Add gpmc dma channel Roger Quadros <rogerq@ti.com> - 2015-10-14 13:50 +0200
Re: [PATCH 4/5] ARM: dts: am437x/am33xx/omap3/dm816x: Add gpmc dma channel "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-14 16:00 +0200
[PATCH 2/5] mtd: nand: omap2: Start dma request before enabling prefetch Franklin S Cooper Jr <fcooper@ti.com> - 2015-10-13 03:50 +0200
Re: [PATCH 2/5] mtd: nand: omap2: Start dma request before enabling prefetch Roger Quadros <rogerq@ti.com> - 2015-10-14 13:50 +0200
Re: [PATCH 2/5] mtd: nand: omap2: Start dma request before enabling prefetch "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-14 15:50 +0200
[PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Franklin S Cooper Jr <fcooper@ti.com> - 2015-10-13 03:50 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Roger Quadros <rogerq@ti.com> - 2015-10-14 13:40 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Roger Quadros <rogerq@ti.com> - 2015-10-14 14:00 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-14 15:30 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Roger Quadros <rogerq@ti.com> - 2015-10-14 16:20 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-14 16:40 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Tony Lindgren <tony@atomide.com> - 2015-10-14 18:20 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-14 18:30 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Tony Lindgren <tony@atomide.com> - 2015-10-14 20:20 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-14 22:10 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT Roger Quadros <rogerq@ti.com> - 2015-10-15 09:40 +0200
Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT "Franklin S Cooper Jr." <fcooper@ti.com> - 2015-10-15 19:20 +0200
Page 2 of 2 — ← Prev page 1 [2]
| From | "Franklin S Cooper Jr." <fcooper@ti.com> |
|---|---|
| Date | 2015-10-14 22:10 +0200 |
| Subject | Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT |
| Message-ID | <qjAx3-CQ-1@gated-at.bofh.it> |
| In reply to | #1247054 |
On 10/14/2015 01:13 PM, Tony Lindgren wrote: > * Franklin S Cooper Jr. <fcooper@ti.com> [151014 09:27]: >> >> On 10/14/2015 11:18 AM, Tony Lindgren wrote: >>> * Franklin S Cooper Jr. <fcooper@ti.com> [151014 07:37]: >>>> On 10/14/2015 09:11 AM, Roger Quadros wrote: >>>>> On 14/10/15 16:26, Franklin S Cooper Jr. wrote: >>>>>> On 10/14/2015 06:52 AM, Roger Quadros wrote: >>>>>>> Franklin, >>>>>>> >>>>>>> On 14/10/15 14:36, Roger Quadros wrote: >>>>>>>> On 13/10/15 04:38, Franklin S Cooper Jr wrote: >>>>>>>>> Switch from dma_request_channel to allow passing dma channel >>>>>>>>> information from DT rather than hardcoding a value. >>>>>>>>> >>>>>>>>> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> >>>>>>>> Acked-by: Roger Quadros <rogerq@ti.com> >>>>>>>> >>>>>>>>> --- >>>>>>>>> drivers/mtd/nand/omap2.c | 4 +++- >>>>>>>>> 1 file changed, 3 insertions(+), 1 deletion(-) >>>>>>>>> >>>>>>>>> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c >>>>>>>>> index d0f2620..957c32f 100644 >>>>>>>>> --- a/drivers/mtd/nand/omap2.c >>>>>>>>> +++ b/drivers/mtd/nand/omap2.c >>>>>>>>> @@ -1866,7 +1866,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>>>>>>>> dma_cap_zero(mask); >>>>>>>>> dma_cap_set(DMA_SLAVE, mask); >>>>>>>>> sig = OMAP24XX_DMA_GPMC; >>>>>>>>> - info->dma = dma_request_channel(mask, omap_dma_filter_fn, &sig); >>>>>>>>> + info->dma = dma_request_slave_channel_compat(mask, >>>>>>>>> + omap_dma_filter_fn, &sig, pdev->dev.parent, "rxtx"); >>>>>>>>> + >>>>>>> Just discovered that you are using the parent device node. >>>>>>> >>>>>>> How about moving the dma bindings to the nand node instead and using >>>>>>> pdev->dev here? >>>>>> Roger, >>>>>> >>>>>> From what I can tell the interrupt number and the dma channel will always be >>>>>> the same no matter what. Doesn't matter if you have multiple nands or a >>>>>> combination of nands and nors. Since that is the case I think it just makes >>>>>> sense to leave it in the gpmc parent node and define it once. >>>>> Is prefetch/writepost dma used for NOR or any other GPMC peripheral >>>>> or only for NAND? >>>> The dma seems tied to the prefetch. From what I can tell the prefetch is only >>>> used by nand. >>>>> Let's also get Tony's inputs on this. >>>> Sure. >>> Hmm so what would keep other devices from using the prefetch >> Looking at the TRM any references to the prefetch are always with respect to >> NAND. >> >> I also see the below mentioned in the TRM. >> Pre-fetch and write posting engine associated with system DMA to get full performance from NAND >> device with minimum impact on NOR/SRAM concurrent access. > OK up to you guys to figure out if it may be usable in a generic way then :) Ok I just got clarification from hw folks. DMA for GPMC can be used for any of the various modes. But the prefetch is specific to NAND. > > Regards, > > Tony -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Roger Quadros <rogerq@ti.com> |
|---|---|
| Date | 2015-10-15 09:40 +0200 |
| Subject | Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT |
| Message-ID | <qjLiO-85x-15@gated-at.bofh.it> |
| In reply to | #1247120 |
On 14/10/15 23:03, Franklin S Cooper Jr. wrote: > > > On 10/14/2015 01:13 PM, Tony Lindgren wrote: >> * Franklin S Cooper Jr. <fcooper@ti.com> [151014 09:27]: >>> >>> On 10/14/2015 11:18 AM, Tony Lindgren wrote: >>>> * Franklin S Cooper Jr. <fcooper@ti.com> [151014 07:37]: >>>>> On 10/14/2015 09:11 AM, Roger Quadros wrote: >>>>>> On 14/10/15 16:26, Franklin S Cooper Jr. wrote: >>>>>>> On 10/14/2015 06:52 AM, Roger Quadros wrote: >>>>>>>> Franklin, >>>>>>>> >>>>>>>> On 14/10/15 14:36, Roger Quadros wrote: >>>>>>>>> On 13/10/15 04:38, Franklin S Cooper Jr wrote: >>>>>>>>>> Switch from dma_request_channel to allow passing dma channel >>>>>>>>>> information from DT rather than hardcoding a value. >>>>>>>>>> >>>>>>>>>> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> >>>>>>>>> Acked-by: Roger Quadros <rogerq@ti.com> >>>>>>>>> >>>>>>>>>> --- >>>>>>>>>> drivers/mtd/nand/omap2.c | 4 +++- >>>>>>>>>> 1 file changed, 3 insertions(+), 1 deletion(-) >>>>>>>>>> >>>>>>>>>> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c >>>>>>>>>> index d0f2620..957c32f 100644 >>>>>>>>>> --- a/drivers/mtd/nand/omap2.c >>>>>>>>>> +++ b/drivers/mtd/nand/omap2.c >>>>>>>>>> @@ -1866,7 +1866,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>>>>>>>>> dma_cap_zero(mask); >>>>>>>>>> dma_cap_set(DMA_SLAVE, mask); >>>>>>>>>> sig = OMAP24XX_DMA_GPMC; >>>>>>>>>> - info->dma = dma_request_channel(mask, omap_dma_filter_fn, &sig); >>>>>>>>>> + info->dma = dma_request_slave_channel_compat(mask, >>>>>>>>>> + omap_dma_filter_fn, &sig, pdev->dev.parent, "rxtx"); >>>>>>>>>> + >>>>>>>> Just discovered that you are using the parent device node. >>>>>>>> >>>>>>>> How about moving the dma bindings to the nand node instead and using >>>>>>>> pdev->dev here? >>>>>>> Roger, >>>>>>> >>>>>>> From what I can tell the interrupt number and the dma channel will always be >>>>>>> the same no matter what. Doesn't matter if you have multiple nands or a >>>>>>> combination of nands and nors. Since that is the case I think it just makes >>>>>>> sense to leave it in the gpmc parent node and define it once. >>>>>> Is prefetch/writepost dma used for NOR or any other GPMC peripheral >>>>>> or only for NAND? >>>>> The dma seems tied to the prefetch. From what I can tell the prefetch is only >>>>> used by nand. >>>>>> Let's also get Tony's inputs on this. >>>>> Sure. >>>> Hmm so what would keep other devices from using the prefetch >>> Looking at the TRM any references to the prefetch are always with respect to >>> NAND. >>> >>> I also see the below mentioned in the TRM. >>> Pre-fetch and write posting engine associated with system DMA to get full performance from NAND >>> device with minimum impact on NOR/SRAM concurrent access. >> OK up to you guys to figure out if it may be usable in a generic way then :) > Ok I just got clarification from hw folks. DMA for GPMC can be used for any of the > various modes. But the prefetch is specific to NAND. In that case the dma information must be in the GPMC node. cheers, -roger -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | "Franklin S Cooper Jr." <fcooper@ti.com> |
|---|---|
| Date | 2015-10-15 19:20 +0200 |
| Subject | Re: [PATCH 1/5] mtd: nand: omap2: Support parsing dma channel information from DT |
| Message-ID | <qjUm6-4xd-21@gated-at.bofh.it> |
| In reply to | #1247530 |
On 10/15/2015 02:35 AM, Roger Quadros wrote: > On 14/10/15 23:03, Franklin S Cooper Jr. wrote: >> >> On 10/14/2015 01:13 PM, Tony Lindgren wrote: >>> * Franklin S Cooper Jr. <fcooper@ti.com> [151014 09:27]: >>>> On 10/14/2015 11:18 AM, Tony Lindgren wrote: >>>>> * Franklin S Cooper Jr. <fcooper@ti.com> [151014 07:37]: >>>>>> On 10/14/2015 09:11 AM, Roger Quadros wrote: >>>>>>> On 14/10/15 16:26, Franklin S Cooper Jr. wrote: >>>>>>>> On 10/14/2015 06:52 AM, Roger Quadros wrote: >>>>>>>>> Franklin, >>>>>>>>> >>>>>>>>> On 14/10/15 14:36, Roger Quadros wrote: >>>>>>>>>> On 13/10/15 04:38, Franklin S Cooper Jr wrote: >>>>>>>>>>> Switch from dma_request_channel to allow passing dma channel >>>>>>>>>>> information from DT rather than hardcoding a value. >>>>>>>>>>> >>>>>>>>>>> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> >>>>>>>>>> Acked-by: Roger Quadros <rogerq@ti.com> >>>>>>>>>> >>>>>>>>>>> --- >>>>>>>>>>> drivers/mtd/nand/omap2.c | 4 +++- >>>>>>>>>>> 1 file changed, 3 insertions(+), 1 deletion(-) >>>>>>>>>>> >>>>>>>>>>> diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c >>>>>>>>>>> index d0f2620..957c32f 100644 >>>>>>>>>>> --- a/drivers/mtd/nand/omap2.c >>>>>>>>>>> +++ b/drivers/mtd/nand/omap2.c >>>>>>>>>>> @@ -1866,7 +1866,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>>>>>>>>>> dma_cap_zero(mask); >>>>>>>>>>> dma_cap_set(DMA_SLAVE, mask); >>>>>>>>>>> sig = OMAP24XX_DMA_GPMC; >>>>>>>>>>> - info->dma = dma_request_channel(mask, omap_dma_filter_fn, &sig); >>>>>>>>>>> + info->dma = dma_request_slave_channel_compat(mask, >>>>>>>>>>> + omap_dma_filter_fn, &sig, pdev->dev.parent, "rxtx"); >>>>>>>>>>> + >>>>>>>>> Just discovered that you are using the parent device node. >>>>>>>>> >>>>>>>>> How about moving the dma bindings to the nand node instead and using >>>>>>>>> pdev->dev here? >>>>>>>> Roger, >>>>>>>> >>>>>>>> From what I can tell the interrupt number and the dma channel will always be >>>>>>>> the same no matter what. Doesn't matter if you have multiple nands or a >>>>>>>> combination of nands and nors. Since that is the case I think it just makes >>>>>>>> sense to leave it in the gpmc parent node and define it once. >>>>>>> Is prefetch/writepost dma used for NOR or any other GPMC peripheral >>>>>>> or only for NAND? >>>>>> The dma seems tied to the prefetch. From what I can tell the prefetch is only >>>>>> used by nand. >>>>>>> Let's also get Tony's inputs on this. >>>>>> Sure. >>>>> Hmm so what would keep other devices from using the prefetch >>>> Looking at the TRM any references to the prefetch are always with respect to >>>> NAND. >>>> >>>> I also see the below mentioned in the TRM. >>>> Pre-fetch and write posting engine associated with system DMA to get full performance from NAND >>>> device with minimum impact on NOR/SRAM concurrent access. >>> OK up to you guys to figure out if it may be usable in a generic way then :) >> Ok I just got clarification from hw folks. DMA for GPMC can be used for any of the >> various modes. But the prefetch is specific to NAND. > In that case the dma information must be in the GPMC node. Ok I'll be sending a v2 patchset soon but I'll be leaving this as is. > > cheers, > -roger -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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