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| Started by | Javier Martinez Canillas <javier@osg.samsung.com> |
|---|---|
| First post | 2015-10-13 15:50 +0200 |
| Last post | 2015-10-13 21:20 +0200 |
| Articles | 2 — 2 participants |
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[PATCH] ata: Allow drivers to build if COMPILE_TEST is enabled Javier Martinez Canillas <javier@osg.samsung.com> - 2015-10-13 15:50 +0200
Re: [PATCH] ata: Allow drivers to build if COMPILE_TEST is enabled kbuild test robot <lkp@intel.com> - 2015-10-13 21:20 +0200
| From | Javier Martinez Canillas <javier@osg.samsung.com> |
|---|---|
| Date | 2015-10-13 15:50 +0200 |
| Subject | [PATCH] ata: Allow drivers to build if COMPILE_TEST is enabled |
| Message-ID | <qj87M-8dT-21@gated-at.bofh.it> |
These drivers only have runtime but no build time dependencies so can be
built for testing purposes if the Kconfig COMPILE_TEST option is enabled.
This is useful to have more build coverage and make sure that drivers are
not affected by changes that could cause build regressions.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
drivers/ata/Kconfig | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 6aaa3f81755b..939f45d094d2 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -100,7 +100,7 @@ config SATA_AHCI_PLATFORM
config AHCI_BRCMSTB
tristate "Broadcom STB AHCI SATA support"
- depends on ARCH_BRCMSTB
+ depends on ARCH_BRCMSTB || COMPILE_TEST
help
This option enables support for the AHCI SATA3 controller found on
STB SoC's.
@@ -109,7 +109,7 @@ config AHCI_BRCMSTB
config AHCI_DA850
tristate "DaVinci DA850 AHCI SATA support"
- depends on ARCH_DAVINCI_DA850
+ depends on ARCH_DAVINCI_DA850 || COMPILE_TEST
help
This option enables support for the DaVinci DA850 SoC's
onboard AHCI SATA.
@@ -118,7 +118,7 @@ config AHCI_DA850
config AHCI_ST
tristate "ST AHCI SATA support"
- depends on ARCH_STI
+ depends on ARCH_STI || COMPILE_TEST
help
This option enables support for ST AHCI SATA controller.
@@ -144,7 +144,7 @@ config AHCI_CEVA
config AHCI_MVEBU
tristate "Marvell EBU AHCI SATA support"
- depends on ARCH_MVEBU
+ depends on ARCH_MVEBU || COMPILE_TEST
help
This option enables support for the Marvebu EBU SoC's
onboard AHCI SATA.
@@ -153,7 +153,7 @@ config AHCI_MVEBU
config AHCI_SUNXI
tristate "Allwinner sunxi AHCI SATA support"
- depends on ARCH_SUNXI
+ depends on ARCH_SUNXI || COMPILE_TEST
help
This option enables support for the Allwinner sunxi SoC's
onboard AHCI SATA.
@@ -162,7 +162,7 @@ config AHCI_SUNXI
config AHCI_TEGRA
tristate "NVIDIA Tegra124 AHCI SATA support"
- depends on ARCH_TEGRA
+ depends on ARCH_TEGRA || COMPILE_TEST
help
This option enables support for the NVIDIA Tegra124 SoC's
onboard AHCI SATA.
@@ -186,7 +186,7 @@ config AHCI_QORIQ
config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
- depends on FSL_SOC
+ depends on FSL_SOC || COMPILE_TEST
help
This option enables support for Freescale 3.0Gbps SATA controller.
It can be found on MPC837x and MPC8315.
@@ -296,7 +296,7 @@ config ATA_PIIX
config SATA_DWC
tristate "DesignWare Cores SATA support"
- depends on 460EX
+ depends on 460EX || COMPILE_TEST
select DW_DMAC
help
This option enables support for the on-chip SATA controller of the
@@ -602,7 +602,7 @@ config PATA_ICSIDE
config PATA_IMX
tristate "PATA support for Freescale iMX"
- depends on ARCH_MXC
+ depends on ARCH_MXC || COMPILE_TEST
help
This option enables support for the PATA host available on Freescale
iMX SoCs.
@@ -820,7 +820,7 @@ config PATA_VIA
config PATA_PXA
tristate "PXA DMA-capable PATA support"
- depends on ARCH_PXA
+ depends on ARCH_PXA || COMPILE_TEST
help
This option enables support for harddrive attached to PXA CPU's bus.
@@ -871,7 +871,7 @@ config PATA_CMD640_PCI
config PATA_ISAPNP
tristate "ISA Plug and Play PATA support"
- depends on ISAPNP
+ depends on ISAPNP || COMPILE_TEST
help
This option enables support for ISA plug & play ATA
controllers such as those found on old soundcards.
@@ -953,7 +953,7 @@ config PATA_OF_PLATFORM
config PATA_QDI
tristate "QDI VLB PATA support"
- depends on ISA
+ depends on ISA || COMPILE_TEST
select PATA_LEGACY
help
Support for QDI 6500 and 6580 PATA controllers on VESA local bus.
@@ -978,7 +978,7 @@ config PATA_RZ1000
config PATA_SAMSUNG_CF
tristate "Samsung SoC PATA support"
- depends on SAMSUNG_DEV_IDE
+ depends on SAMSUNG_DEV_IDE || COMPILE_TEST
help
This option enables basic support for Samsung's S3C/S5P board
PATA controllers via the new ATA layer
@@ -987,7 +987,7 @@ config PATA_SAMSUNG_CF
config PATA_WINBOND_VLB
tristate "Winbond W83759A VLB PATA support (Experimental)"
- depends on ISA
+ depends on ISA || COMPILE_TEST
select PATA_LEGACY
help
Support for the Winbond W83759A controller on Vesa Local Bus
--
2.4.3
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| From | kbuild test robot <lkp@intel.com> |
|---|---|
| Date | 2015-10-13 21:20 +0200 |
| Message-ID | <qjdh8-7r3-5@gated-at.bofh.it> |
| In reply to | #1245728 |
Hi Javier,
[auto build test WARNING on tj-libata/for-next -- if it's inappropriate base, please suggest rules for selecting the more suitable base]
url: https://github.com/0day-ci/linux/commits/Javier-Martinez-Canillas/ata-Allow-drivers-to-build-if-COMPILE_TEST-is-enabled/20151013-214138
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
>> drivers/ata/sata_fsl.c:428:30: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:428:30: expected unsigned int [unsigned] [usertype] cda
drivers/ata/sata_fsl.c:428:30: got restricted __le32 [usertype] <noident>
>> drivers/ata/sata_fsl.c:429:39: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:429:39: expected unsigned int [unsigned] [usertype] prde_fis_len
drivers/ata/sata_fsl.c:429:39: got restricted __le32 [usertype] <noident>
>> drivers/ata/sata_fsl.c:431:30: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:431:30: expected unsigned int [unsigned] [usertype] ttl
drivers/ata/sata_fsl.c:431:30: got restricted __le32 [usertype] <noident>
>> drivers/ata/sata_fsl.c:432:36: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:432:36: expected unsigned int [unsigned] [usertype] desc_info
drivers/ata/sata_fsl.c:432:36: got restricted __le32 [usertype] <noident>
>> drivers/ata/sata_fsl.c:484:34: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:484:34: expected unsigned int [unsigned] [usertype] dba
drivers/ata/sata_fsl.c:484:34: got restricted __le32 [usertype] <noident>
drivers/ata/sata_fsl.c:491:26: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:491:26: expected unsigned int [unsigned] [usertype] dba
drivers/ata/sata_fsl.c:491:26: got restricted __le32 [usertype] <noident>
>> drivers/ata/sata_fsl.c:492:34: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:492:34: expected unsigned int [unsigned] [usertype] ddc_and_ext
drivers/ata/sata_fsl.c:492:34: got restricted __le32 [usertype] <noident>
drivers/ata/sata_fsl.c:505:54: sparse: incorrect type in assignment (different base types)
drivers/ata/sata_fsl.c:505:54: expected unsigned int [unsigned] [usertype] ddc_and_ext
drivers/ata/sata_fsl.c:505:54: got restricted __le32 [usertype] <noident>
drivers/ata/sata_fsl.c:1410:9: sparse: Initializer entry defined twice
drivers/ata/sata_fsl.c:1411:10: also defined here
vim +428 drivers/ata/sata_fsl.c
faf0b2e5 Li Yang 2007-10-16 422
faf0b2e5 Li Yang 2007-10-16 423 cmd_descriptor_address = pp->cmdentry_paddr +
faf0b2e5 Li Yang 2007-10-16 424 tag * SATA_FSL_CMD_DESC_SIZE;
faf0b2e5 Li Yang 2007-10-16 425
faf0b2e5 Li Yang 2007-10-16 426 /* NOTE: both data_xfer_len & fis_len are Dword counts */
faf0b2e5 Li Yang 2007-10-16 427
faf0b2e5 Li Yang 2007-10-16 @428 pp->cmdslot[tag].cda = cpu_to_le32(cmd_descriptor_address);
faf0b2e5 Li Yang 2007-10-16 @429 pp->cmdslot[tag].prde_fis_len =
faf0b2e5 Li Yang 2007-10-16 430 cpu_to_le32((num_prde << 16) | (fis_len << 2));
faf0b2e5 Li Yang 2007-10-16 @431 pp->cmdslot[tag].ttl = cpu_to_le32(data_xfer_len & ~0x03);
520d3a1a Li Yang 2007-10-31 @432 pp->cmdslot[tag].desc_info = cpu_to_le32(desc_info | (tag & 0x1F));
faf0b2e5 Li Yang 2007-10-16 433
faf0b2e5 Li Yang 2007-10-16 434 VPRINTK("cda=0x%x, prde_fis_len=0x%x, ttl=0x%x, di=0x%x\n",
faf0b2e5 Li Yang 2007-10-16 435 pp->cmdslot[tag].cda,
faf0b2e5 Li Yang 2007-10-16 436 pp->cmdslot[tag].prde_fis_len,
faf0b2e5 Li Yang 2007-10-16 437 pp->cmdslot[tag].ttl, pp->cmdslot[tag].desc_info);
faf0b2e5 Li Yang 2007-10-16 438
faf0b2e5 Li Yang 2007-10-16 439 }
faf0b2e5 Li Yang 2007-10-16 440
faf0b2e5 Li Yang 2007-10-16 441 static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc,
2f957fc9 Xulei 2011-01-19 442 u32 *ttl, dma_addr_t cmd_desc_paddr,
2f957fc9 Xulei 2011-01-19 443 int data_snoop)
faf0b2e5 Li Yang 2007-10-16 444 {
faf0b2e5 Li Yang 2007-10-16 445 struct scatterlist *sg;
faf0b2e5 Li Yang 2007-10-16 446 unsigned int num_prde = 0;
faf0b2e5 Li Yang 2007-10-16 447 u32 ttl_dwords = 0;
faf0b2e5 Li Yang 2007-10-16 448
faf0b2e5 Li Yang 2007-10-16 449 /*
af901ca1 André Goddard Rosa 2009-11-14 450 * NOTE : direct & indirect prdt's are contiguously allocated
faf0b2e5 Li Yang 2007-10-16 451 */
faf0b2e5 Li Yang 2007-10-16 452 struct prde *prd = (struct prde *)&((struct command_desc *)
faf0b2e5 Li Yang 2007-10-16 453 cmd_desc)->prdt;
faf0b2e5 Li Yang 2007-10-16 454
faf0b2e5 Li Yang 2007-10-16 455 struct prde *prd_ptr_to_indirect_ext = NULL;
faf0b2e5 Li Yang 2007-10-16 456 unsigned indirect_ext_segment_sz = 0;
faf0b2e5 Li Yang 2007-10-16 457 dma_addr_t indirect_ext_segment_paddr;
ff2aeb1e Tejun Heo 2007-12-05 458 unsigned int si;
faf0b2e5 Li Yang 2007-10-16 459
b1f5dc48 Anton Vorontsov 2008-02-22 460 VPRINTK("SATA FSL : cd = 0x%p, prd = 0x%p\n", cmd_desc, prd);
faf0b2e5 Li Yang 2007-10-16 461
faf0b2e5 Li Yang 2007-10-16 462 indirect_ext_segment_paddr = cmd_desc_paddr +
faf0b2e5 Li Yang 2007-10-16 463 SATA_FSL_CMD_DESC_OFFSET_TO_PRDT + SATA_FSL_MAX_PRD_DIRECT * 16;
faf0b2e5 Li Yang 2007-10-16 464
ff2aeb1e Tejun Heo 2007-12-05 465 for_each_sg(qc->sg, sg, qc->n_elem, si) {
faf0b2e5 Li Yang 2007-10-16 466 dma_addr_t sg_addr = sg_dma_address(sg);
faf0b2e5 Li Yang 2007-10-16 467 u32 sg_len = sg_dma_len(sg);
faf0b2e5 Li Yang 2007-10-16 468
f48c019f Kumar Gala 2009-05-13 469 VPRINTK("SATA FSL : fill_sg, sg_addr = 0x%llx, sg_len = %d\n",
f48c019f Kumar Gala 2009-05-13 470 (unsigned long long)sg_addr, sg_len);
faf0b2e5 Li Yang 2007-10-16 471
faf0b2e5 Li Yang 2007-10-16 472 /* warn if each s/g element is not dword aligned */
6b4b8fc8 Qiang Liu 2012-02-15 473 if (unlikely(sg_addr & 0x03))
a9a79dfe Joe Perches 2011-04-15 474 ata_port_err(qc->ap, "s/g addr unaligned : 0x%llx\n",
f48c019f Kumar Gala 2009-05-13 475 (unsigned long long)sg_addr);
6b4b8fc8 Qiang Liu 2012-02-15 476 if (unlikely(sg_len & 0x03))
a9a79dfe Joe Perches 2011-04-15 477 ata_port_err(qc->ap, "s/g len unaligned : 0x%x\n",
a9a79dfe Joe Perches 2011-04-15 478 sg_len);
faf0b2e5 Li Yang 2007-10-16 479
37198e30 James Bottomley 2008-02-05 480 if (num_prde == (SATA_FSL_MAX_PRD_DIRECT - 1) &&
37198e30 James Bottomley 2008-02-05 481 sg_next(sg) != NULL) {
faf0b2e5 Li Yang 2007-10-16 482 VPRINTK("setting indirect prde\n");
faf0b2e5 Li Yang 2007-10-16 483 prd_ptr_to_indirect_ext = prd;
faf0b2e5 Li Yang 2007-10-16 @484 prd->dba = cpu_to_le32(indirect_ext_segment_paddr);
faf0b2e5 Li Yang 2007-10-16 485 indirect_ext_segment_sz = 0;
faf0b2e5 Li Yang 2007-10-16 486 ++prd;
faf0b2e5 Li Yang 2007-10-16 487 ++num_prde;
faf0b2e5 Li Yang 2007-10-16 488 }
faf0b2e5 Li Yang 2007-10-16 489
faf0b2e5 Li Yang 2007-10-16 490 ttl_dwords += sg_len;
faf0b2e5 Li Yang 2007-10-16 491 prd->dba = cpu_to_le32(sg_addr);
2f957fc9 Xulei 2011-01-19 @492 prd->ddc_and_ext = cpu_to_le32(data_snoop | (sg_len & ~0x03));
faf0b2e5 Li Yang 2007-10-16 493
faf0b2e5 Li Yang 2007-10-16 494 VPRINTK("sg_fill, ttl=%d, dba=0x%x, ddc=0x%x\n",
faf0b2e5 Li Yang 2007-10-16 495 ttl_dwords, prd->dba, prd->ddc_and_ext);
:::::: The code at line 428 was first introduced by commit
:::::: faf0b2e5afe7dae072d2715763c7f992b612b628 drivers/ata: add support to Freescale 3.0Gbps SATA Controller
:::::: TO: Li Yang <leoli@freescale.com>
:::::: CC: Jeff Garzik <jeff@garzik.org>
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