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Groups > linux.kernel > #1245510 > unrolled thread

[PATCH 0/4] Add tune support of Mediatek MMC driver

Started byChaotian Jing <chaotian.jing@mediatek.com>
First post2015-10-13 11:40 +0200
Last post2015-10-14 03:30 +0200
Articles 4 — 2 participants

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  [PATCH 0/4] Add tune support of Mediatek MMC driver  Chaotian Jing <chaotian.jing@mediatek.com> - 2015-10-13 11:40 +0200
    [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings Chaotian Jing <chaotian.jing@mediatek.com> - 2015-10-13 11:50 +0200
      Re: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings Mark Rutland <mark.rutland@arm.com> - 2015-10-13 12:40 +0200
        Re: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings Chaotian Jing <chaotian.jing@mediatek.com> - 2015-10-14 03:30 +0200

#1245510 — [PATCH 0/4] Add tune support of Mediatek MMC driver

FromChaotian Jing <chaotian.jing@mediatek.com>
Date2015-10-13 11:40 +0200
Subject[PATCH 0/4] Add tune support of Mediatek MMC driver
Message-ID<qj4dQ-2vA-9@gated-at.bofh.it>
Add DT bindings for eMMC hardware reset
Add pinctrl of data strobe pin for HS400 mode
Modify eMMC driving settings
Add 400mhz source clock for HS400 mode
Add eMMC HS200/HS400 mode support
Add SD SDR50/SDR104 mode support
Add implement of tune funtion with CMD19/CMD21

Chaotian Jing (4):
  mmc: core: Add DT bindings for eMMC hardware reset support
  mmc: dt-bindings: update Mediatek MMC bindings
  mmc: mediatek: Add tune support
  arm64: dts: mediatek:: Add HS200/HS400/SDR50/SDR104 support

 Documentation/devicetree/bindings/mmc/mmc.txt    |   1 +
 Documentation/devicetree/bindings/mmc/mtk-sd.txt |  12 +-
 arch/arm64/boot/dts/mediatek/mt8173-evb.dts      |  21 +-
 arch/arm64/boot/dts/mediatek/mt8173.dtsi         |   5 +-
 drivers/mmc/core/host.c                          |   2 +
 drivers/mmc/host/mtk-sd.c                        | 359 +++++++++++++++++++++--
 6 files changed, 364 insertions(+), 36 deletions(-)

-- 
1.8.1.1.dirty

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#1245521 — [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings

FromChaotian Jing <chaotian.jing@mediatek.com>
Date2015-10-13 11:50 +0200
Subject[PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings
Message-ID<qj4nx-2GQ-33@gated-at.bofh.it>
In reply to#1245510
Add 400Mhz clock source for HS400 mode

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
---
 Documentation/devicetree/bindings/mmc/mtk-sd.txt | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
index a1adfa4..745bee2 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
@@ -17,6 +17,11 @@ Required properties:
 - vmmc-supply: power to the Core
 - vqmmc-supply: power to the IO
 
+Optional properties:
+- clocks: 400mhz clock source for HS400
+- clock-names: "400mhz"
+- hs400-ds-delay: HS400 DS delay setting
+
 Examples:
 mmc0: mmc@11230000 {
 	compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";
@@ -24,9 +29,12 @@ mmc0: mmc@11230000 {
 	interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
 	vmmc-supply = <&mt6397_vemc_3v3_reg>;
 	vqmmc-supply = <&mt6397_vio18_reg>;
-	clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
-	clock-names = "source", "hclk";
+	clocks = <&pericfg CLK_PERI_MSDC30_0>,
+	         <&topckgen CLK_TOP_MSDC50_0_H_SEL>,
+		 <&topckgen CLK_TOP_MSDCPLL_D2> ;
+	clock-names = "source", "hclk", "400mhz";
 	pinctrl-names = "default", "state_uhs";
 	pinctrl-0 = <&mmc0_pins_default>;
 	pinctrl-1 = <&mmc0_pins_uhs>;
+	hs400-ds-delay = <0x14015>;
 };
-- 
1.8.1.1.dirty

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#1245562 — Re: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings

FromMark Rutland <mark.rutland@arm.com>
Date2015-10-13 12:40 +0200
SubjectRe: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings
Message-ID<qj59U-3SV-11@gated-at.bofh.it>
In reply to#1245521
On Tue, Oct 13, 2015 at 05:37:56PM +0800, Chaotian Jing wrote:
> Add 400Mhz clock source for HS400 mode
> 
> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
> ---
>  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> index a1adfa4..745bee2 100644
> --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> @@ -17,6 +17,11 @@ Required properties:
>  - vmmc-supply: power to the Core
>  - vqmmc-supply: power to the IO
>  
> +Optional properties:
> +- clocks: 400mhz clock source for HS400
> +- clock-names: "400mhz"

Is that really what the input line is called?

> +- hs400-ds-delay: HS400 DS delay setting

What is the format of this? Where can I derive the correct value?

Mark.

> +
>  Examples:
>  mmc0: mmc@11230000 {
>  	compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";
> @@ -24,9 +29,12 @@ mmc0: mmc@11230000 {
>  	interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
>  	vmmc-supply = <&mt6397_vemc_3v3_reg>;
>  	vqmmc-supply = <&mt6397_vio18_reg>;
> -	clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
> -	clock-names = "source", "hclk";
> +	clocks = <&pericfg CLK_PERI_MSDC30_0>,
> +	         <&topckgen CLK_TOP_MSDC50_0_H_SEL>,
> +		 <&topckgen CLK_TOP_MSDCPLL_D2> ;
> +	clock-names = "source", "hclk", "400mhz";
>  	pinctrl-names = "default", "state_uhs";
>  	pinctrl-0 = <&mmc0_pins_default>;
>  	pinctrl-1 = <&mmc0_pins_uhs>;
> +	hs400-ds-delay = <0x14015>;
>  };
> -- 
> 1.8.1.1.dirty
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 
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#1246239 — Re: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings

FromChaotian Jing <chaotian.jing@mediatek.com>
Date2015-10-14 03:30 +0200
SubjectRe: [PATCH 2/4] mmc: dt-bindings: update Mediatek MMC bindings
Message-ID<qjj3c-7OQ-3@gated-at.bofh.it>
In reply to#1245562
On Tue, 2015-10-13 at 11:38 +0100, Mark Rutland wrote:
> On Tue, Oct 13, 2015 at 05:37:56PM +0800, Chaotian Jing wrote:
> > Add 400Mhz clock source for HS400 mode
> > 
> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
> > ---
> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 12 ++++++++++--
> >  1 file changed, 10 insertions(+), 2 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> > index a1adfa4..745bee2 100644
> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
> > @@ -17,6 +17,11 @@ Required properties:
> >  - vmmc-supply: power to the Core
> >  - vqmmc-supply: power to the IO
> >  
> > +Optional properties:
> > +- clocks: 400mhz clock source for HS400
> > +- clock-names: "400mhz"
> 
> Is that really what the input line is called?
> 
> > +- hs400-ds-delay: HS400 DS delay setting
> 
> What is the format of this? Where can I derive the correct value?
> 
> Mark.
> 
This is the value of register PAD_DS_TUNE(0x188), in general, this value
is the default value of register PAD_DS_TUNE(different platform has
different value, 0x14015 is the default value of MT8173). And, this
register is used to tune data in HS400 mode, but as you know, HS400 mode
do not support CMD21, so we need find a "best" value to cover HS400
mode, if default value does not work, we have an off-line calibration
program to find the best value.
> > +
> >  Examples:
> >  mmc0: mmc@11230000 {
> >  	compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc";
> > @@ -24,9 +29,12 @@ mmc0: mmc@11230000 {
> >  	interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
> >  	vmmc-supply = <&mt6397_vemc_3v3_reg>;
> >  	vqmmc-supply = <&mt6397_vio18_reg>;
> > -	clocks = <&pericfg CLK_PERI_MSDC30_0>, <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
> > -	clock-names = "source", "hclk";
> > +	clocks = <&pericfg CLK_PERI_MSDC30_0>,
> > +	         <&topckgen CLK_TOP_MSDC50_0_H_SEL>,
> > +		 <&topckgen CLK_TOP_MSDCPLL_D2> ;
> > +	clock-names = "source", "hclk", "400mhz";
> >  	pinctrl-names = "default", "state_uhs";
> >  	pinctrl-0 = <&mmc0_pins_default>;
> >  	pinctrl-1 = <&mmc0_pins_uhs>;
> > +	hs400-ds-delay = <0x14015>;
> >  };
> > -- 
> > 1.8.1.1.dirty
> > 
> > 
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> > 


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