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Groups > linux.kernel > #1245506 > unrolled thread

[PATCH 0/4] add support for GICv3 on the Foundation model

Started byAndre Przywara <andre.przywara@arm.com>
First post2015-10-13 11:40 +0200
Last post2015-10-13 11:50 +0200
Articles 4 — 2 participants

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  [PATCH 0/4] add support for GICv3 on the Foundation model Andre Przywara <andre.przywara@arm.com> - 2015-10-13 11:40 +0200
    [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1 Andre Przywara <andre.przywara@arm.com> - 2015-10-13 11:40 +0200
      Re: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region  to allow EOImode=1 Marc Zyngier <marc.zyngier@arm.com> - 2015-10-13 12:50 +0200
    [PATCH 1/4] arm64: dts: prepare foundation-v8.dts to cope with GICv3 Andre Przywara <andre.przywara@arm.com> - 2015-10-13 11:50 +0200

#1245506 — [PATCH 0/4] add support for GICv3 on the Foundation model

FromAndre Przywara <andre.przywara@arm.com>
Date2015-10-13 11:40 +0200
Subject[PATCH 0/4] add support for GICv3 on the Foundation model
Message-ID<qj4dQ-2vA-13@gated-at.bofh.it>
Hi,

the freely available ARM Foundation model [1] supports emulating a
GICv3 interrupt controller (--gicv3).
To provide the kernel with the proper information, prepare the
existing model .dts to be split up and eventually create a new .dts
file which can be used to boot a kernel using the GICv3 in the model.

Patch 1/4 changes the common device tree to allow sharing most of the
definitions later, while patch 2/4 is a drive-by-fix to add support
for the recently enabled EOImode=1.
Patch 3/4 splits the existing DT up to have a common .dtsi file and a
stub foundation-v8.dts in preparation for the final patch 4/4, which
adds a new foundation-v8-gicv3.dts that has the required GICv3 node.

Together with the GICv3 support of the bootwrapper this allows to boot
Linux and make it use the GICv3 interrupt controller.

Cheers,
Andre.

[1]: http://www.arm.com/products/tools/models/fast-models/foundation-model.php

Andre Przywara (4):
  arm64: dts: prepare foundation-v8.dts to cope with GICv3
  arm64: dts: Foundation model: increate GICC region to allow EOImode=1
  arm64: dts: split Foundation model dts to put the GIC separately
  arm64: dts: add .dts for GICv3 Foundation model

 arch/arm64/boot/dts/arm/Makefile                   |   2 +-
 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts    |  30 +++
 arch/arm64/boot/dts/arm/foundation-v8.dts          | 227 +--------------------
 .../arm/{foundation-v8.dts => foundation-v8.dtsi}  |  98 ++++-----
 4 files changed, 78 insertions(+), 279 deletions(-)
 create mode 100644 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
 copy arch/arm64/boot/dts/arm/{foundation-v8.dts => foundation-v8.dtsi} (73%)

-- 
2.5.1

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#1245508 — [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

FromAndre Przywara <andre.przywara@arm.com>
Date2015-10-13 11:40 +0200
Subject[PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1
Message-ID<qj4dR-2vA-35@gated-at.bofh.it>
In reply to#1245506
Recent commits made the GIC driver use EOImode=1 for all GICs
that advertise the proper GICC region size.
To let the model benefit from the blessings of that mode, increase
the GICC region to its actual size of 8K.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/foundation-v8.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 3c5595d..57ad9fe 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -78,7 +78,7 @@
 		#address-cells = <2>;
 		interrupt-controller;
 		reg = <0x0 0x2c001000 0 0x1000>,
-		      <0x0 0x2c002000 0 0x1000>,
+		      <0x0 0x2c002000 0 0x2000>,
 		      <0x0 0x2c004000 0 0x2000>,
 		      <0x0 0x2c006000 0 0x2000>;
 		interrupts = <1 9 0xf04>;
-- 
2.5.1

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#1245572 — Re: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

FromMarc Zyngier <marc.zyngier@arm.com>
Date2015-10-13 12:50 +0200
SubjectRe: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1
Message-ID<qj5jB-45m-31@gated-at.bofh.it>
In reply to#1245508
Hi Andre,

s/increate/increase size of/ in the subject line

On 13/10/15 10:37, Andre Przywara wrote:
> Recent commits made the GIC driver use EOImode=1 for all GICs
> that advertise the proper GICC region size.

Well, it is not so much that the kernel uses EOImode=1, but the fact
that the model has a GICv2 implementation, hence a 8kB GICC region.

> To let the model benefit from the blessings of that mode, increase
> the GICC region to its actual size of 8K.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/arm/foundation-v8.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> index 3c5595d..57ad9fe 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> @@ -78,7 +78,7 @@
>  		#address-cells = <2>;
>  		interrupt-controller;
>  		reg = <0x0 0x2c001000 0 0x1000>,
> -		      <0x0 0x2c002000 0 0x1000>,
> +		      <0x0 0x2c002000 0 0x2000>,
>  		      <0x0 0x2c004000 0 0x2000>,
>  		      <0x0 0x2c006000 0 0x2000>;
>  		interrupts = <1 9 0xf04>;
> 

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...
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#1245519 — [PATCH 1/4] arm64: dts: prepare foundation-v8.dts to cope with GICv3

FromAndre Przywara <andre.przywara@arm.com>
Date2015-10-13 11:50 +0200
Subject[PATCH 1/4] arm64: dts: prepare foundation-v8.dts to cope with GICv3
Message-ID<qj4nx-2GQ-27@gated-at.bofh.it>
In reply to#1245506
To prepare the ARM foundation model to support GICv3, we adjust
the #address-cells property of the current GICv2 node to be
compatible with the two cells required for GICv3 later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/foundation-v8.dts | 88 +++++++++++++++----------------
 1 file changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 4eac8dc..3c5595d 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -75,7 +75,7 @@
 	gic: interrupt-controller@2c001000 {
 		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
-		#address-cells = <0>;
+		#address-cells = <2>;
 		interrupt-controller;
 		reg = <0x0 0x2c001000 0 0x1000>,
 		      <0x0 0x2c002000 0 0x1000>,
@@ -116,49 +116,49 @@
 
 		#interrupt-cells = <1>;
 		interrupt-map-mask = <0 0 63>;
-		interrupt-map = <0 0  0 &gic 0  0 4>,
-				<0 0  1 &gic 0  1 4>,
-				<0 0  2 &gic 0  2 4>,
-				<0 0  3 &gic 0  3 4>,
-				<0 0  4 &gic 0  4 4>,
-				<0 0  5 &gic 0  5 4>,
-				<0 0  6 &gic 0  6 4>,
-				<0 0  7 &gic 0  7 4>,
-				<0 0  8 &gic 0  8 4>,
-				<0 0  9 &gic 0  9 4>,
-				<0 0 10 &gic 0 10 4>,
-				<0 0 11 &gic 0 11 4>,
-				<0 0 12 &gic 0 12 4>,
-				<0 0 13 &gic 0 13 4>,
-				<0 0 14 &gic 0 14 4>,
-				<0 0 15 &gic 0 15 4>,
-				<0 0 16 &gic 0 16 4>,
-				<0 0 17 &gic 0 17 4>,
-				<0 0 18 &gic 0 18 4>,
-				<0 0 19 &gic 0 19 4>,
-				<0 0 20 &gic 0 20 4>,
-				<0 0 21 &gic 0 21 4>,
-				<0 0 22 &gic 0 22 4>,
-				<0 0 23 &gic 0 23 4>,
-				<0 0 24 &gic 0 24 4>,
-				<0 0 25 &gic 0 25 4>,
-				<0 0 26 &gic 0 26 4>,
-				<0 0 27 &gic 0 27 4>,
-				<0 0 28 &gic 0 28 4>,
-				<0 0 29 &gic 0 29 4>,
-				<0 0 30 &gic 0 30 4>,
-				<0 0 31 &gic 0 31 4>,
-				<0 0 32 &gic 0 32 4>,
-				<0 0 33 &gic 0 33 4>,
-				<0 0 34 &gic 0 34 4>,
-				<0 0 35 &gic 0 35 4>,
-				<0 0 36 &gic 0 36 4>,
-				<0 0 37 &gic 0 37 4>,
-				<0 0 38 &gic 0 38 4>,
-				<0 0 39 &gic 0 39 4>,
-				<0 0 40 &gic 0 40 4>,
-				<0 0 41 &gic 0 41 4>,
-				<0 0 42 &gic 0 42 4>;
+		interrupt-map = <0 0  0 &gic 0 0 0  0 4>,
+				<0 0  1 &gic 0 0 0  1 4>,
+				<0 0  2 &gic 0 0 0  2 4>,
+				<0 0  3 &gic 0 0 0  3 4>,
+				<0 0  4 &gic 0 0 0  4 4>,
+				<0 0  5 &gic 0 0 0  5 4>,
+				<0 0  6 &gic 0 0 0  6 4>,
+				<0 0  7 &gic 0 0 0  7 4>,
+				<0 0  8 &gic 0 0 0  8 4>,
+				<0 0  9 &gic 0 0 0  9 4>,
+				<0 0 10 &gic 0 0 0 10 4>,
+				<0 0 11 &gic 0 0 0 11 4>,
+				<0 0 12 &gic 0 0 0 12 4>,
+				<0 0 13 &gic 0 0 0 13 4>,
+				<0 0 14 &gic 0 0 0 14 4>,
+				<0 0 15 &gic 0 0 0 15 4>,
+				<0 0 16 &gic 0 0 0 16 4>,
+				<0 0 17 &gic 0 0 0 17 4>,
+				<0 0 18 &gic 0 0 0 18 4>,
+				<0 0 19 &gic 0 0 0 19 4>,
+				<0 0 20 &gic 0 0 0 20 4>,
+				<0 0 21 &gic 0 0 0 21 4>,
+				<0 0 22 &gic 0 0 0 22 4>,
+				<0 0 23 &gic 0 0 0 23 4>,
+				<0 0 24 &gic 0 0 0 24 4>,
+				<0 0 25 &gic 0 0 0 25 4>,
+				<0 0 26 &gic 0 0 0 26 4>,
+				<0 0 27 &gic 0 0 0 27 4>,
+				<0 0 28 &gic 0 0 0 28 4>,
+				<0 0 29 &gic 0 0 0 29 4>,
+				<0 0 30 &gic 0 0 0 30 4>,
+				<0 0 31 &gic 0 0 0 31 4>,
+				<0 0 32 &gic 0 0 0 32 4>,
+				<0 0 33 &gic 0 0 0 33 4>,
+				<0 0 34 &gic 0 0 0 34 4>,
+				<0 0 35 &gic 0 0 0 35 4>,
+				<0 0 36 &gic 0 0 0 36 4>,
+				<0 0 37 &gic 0 0 0 37 4>,
+				<0 0 38 &gic 0 0 0 38 4>,
+				<0 0 39 &gic 0 0 0 39 4>,
+				<0 0 40 &gic 0 0 0 40 4>,
+				<0 0 41 &gic 0 0 0 41 4>,
+				<0 0 42 &gic 0 0 0 42 4>;
 
 		ethernet@2,02000000 {
 			compatible = "smsc,lan91c111";
-- 
2.5.1

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