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| Started by | Tony Lindgren <tony@atomide.com> |
|---|---|
| First post | 2015-10-12 23:30 +0200 |
| Last post | 2015-10-13 00:10 +0200 |
| Articles | 7 — 2 participants |
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Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Tony Lindgren <tony@atomide.com> - 2015-10-12 23:30 +0200
Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Kishon Vijay Abraham I <kishon@ti.com> - 2015-10-12 23:50 +0200
Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Kishon Vijay Abraham I <kishon@ti.com> - 2015-10-13 00:10 +0200
Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Tony Lindgren <tony@atomide.com> - 2015-10-13 00:20 +0200
Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Kishon Vijay Abraham I <kishon@ti.com> - 2015-10-13 00:20 +0200
Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Tony Lindgren <tony@atomide.com> - 2015-10-13 00:30 +0200
Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie Tony Lindgren <tony@atomide.com> - 2015-10-13 00:10 +0200
| From | Tony Lindgren <tony@atomide.com> |
|---|---|
| Date | 2015-10-12 23:30 +0200 |
| Subject | Re: [PATCH v2 1/4] ARM: dts: dra7: Add dt node for the sycon pcie |
| Message-ID | <qiSPo-2Lm-17@gated-at.bofh.it> |
* Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
> Add new device tree node for the control module register space where
> PCIe registers are present.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> arch/arm/boot/dts/dra7.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 5d65db9..0769b5d 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -154,6 +154,11 @@
> compatible = "syscon";
> reg = <0x1c04 0x0020>;
> };
> +
> + scm_conf_pcie: tisyscon@1c24 {
> + compatible = "syscon";
> + reg = <0x1c24 0x0024>;
> + };
> };
>
> cm_core_aon: cm_core_aon@5000 {
Why don't you just extend the existing scm_conf1 area? This is not all pcie
specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
and MUXSEL_32K_CLKIN.
Regards,
Tony
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| From | Kishon Vijay Abraham I <kishon@ti.com> |
|---|---|
| Date | 2015-10-12 23:50 +0200 |
| Message-ID | <qiT8K-37K-11@gated-at.bofh.it> |
| In reply to | #1245152 |
Hi Tony,
On Tuesday 13 October 2015 02:51 AM, Tony Lindgren wrote:
> * Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
>> Add new device tree node for the control module register space where
>> PCIe registers are present.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> arch/arm/boot/dts/dra7.dtsi | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>> index 5d65db9..0769b5d 100644
>> --- a/arch/arm/boot/dts/dra7.dtsi
>> +++ b/arch/arm/boot/dts/dra7.dtsi
>> @@ -154,6 +154,11 @@
>> compatible = "syscon";
>> reg = <0x1c04 0x0020>;
>> };
>> +
>> + scm_conf_pcie: tisyscon@1c24 {
>> + compatible = "syscon";
>> + reg = <0x1c24 0x0024>;
>> + };
>> };
>>
>> cm_core_aon: cm_core_aon@5000 {
>
>
> Why don't you just extend the existing scm_conf1 area? This is not all pcie
> specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
> and MUXSEL_32K_CLKIN.
scm_conf_pcie has only PCIe registers (it starts at 0x4A003C24).
PLLEN_CONTROL and others are at 0x4A003C14 as per
DRA75x_DRA74x_SR1.1_NDA_TRM_vW.
Since PCIe itself has a bunch of registers for itself, thought of
creating a separate dt node. But I can extend scm_conf1 area.
Thanks
Kishon
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| From | Kishon Vijay Abraham I <kishon@ti.com> |
|---|---|
| Date | 2015-10-13 00:10 +0200 |
| Message-ID | <qiTs5-3JD-7@gated-at.bofh.it> |
| In reply to | #1245173 |
Hi,
On Tuesday 13 October 2015 03:33 AM, Tony Lindgren wrote:
> * Kishon Vijay Abraham I <kishon@ti.com> [151012 14:50]:
>> Hi Tony,
>>
>> On Tuesday 13 October 2015 02:51 AM, Tony Lindgren wrote:
>>> * Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
>>>> Add new device tree node for the control module register space where
>>>> PCIe registers are present.
>>>>
>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>>> ---
>>>> arch/arm/boot/dts/dra7.dtsi | 5 +++++
>>>> 1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>>> index 5d65db9..0769b5d 100644
>>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>>> @@ -154,6 +154,11 @@
>>>> compatible = "syscon";
>>>> reg = <0x1c04 0x0020>;
>>>> };
>>>> +
>>>> + scm_conf_pcie: tisyscon@1c24 {
>>>> + compatible = "syscon";
>>>> + reg = <0x1c24 0x0024>;
>>>> + };
>>>> };
>>>>
>>>> cm_core_aon: cm_core_aon@5000 {
>>>
>>>
>>> Why don't you just extend the existing scm_conf1 area? This is not all pcie
>>> specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
>>> and MUXSEL_32K_CLKIN.
>>
>> scm_conf_pcie has only PCIe registers (it starts at 0x4A003C24).
>> PLLEN_CONTROL and others are at 0x4A003C14 as per
>> DRA75x_DRA74x_SR1.1_NDA_TRM_vW.
>
> Oh sorry I guess I was looking at a wrong address then.
>
>> Since PCIe itself has a bunch of registers for itself, thought of
>> creating a separate dt node. But I can extend scm_conf1 area.
>
> Why not just ioremap them then? Do these need to be shared with
> some other driver?
yeah, some are used by PCIe controller driver and some are used by PCIe
PHY driver.
Thanks
Kishon
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| From | Tony Lindgren <tony@atomide.com> |
|---|---|
| Date | 2015-10-13 00:20 +0200 |
| Message-ID | <qiTBM-3UK-11@gated-at.bofh.it> |
| In reply to | #1245182 |
* Kishon Vijay Abraham I <kishon@ti.com> [151012 15:09]:
> Hi,
>
> On Tuesday 13 October 2015 03:33 AM, Tony Lindgren wrote:
> > * Kishon Vijay Abraham I <kishon@ti.com> [151012 14:50]:
> >> Hi Tony,
> >>
> >> On Tuesday 13 October 2015 02:51 AM, Tony Lindgren wrote:
> >>> * Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
> >>>> Add new device tree node for the control module register space where
> >>>> PCIe registers are present.
> >>>>
> >>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >>>> ---
> >>>> arch/arm/boot/dts/dra7.dtsi | 5 +++++
> >>>> 1 file changed, 5 insertions(+)
> >>>>
> >>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> >>>> index 5d65db9..0769b5d 100644
> >>>> --- a/arch/arm/boot/dts/dra7.dtsi
> >>>> +++ b/arch/arm/boot/dts/dra7.dtsi
> >>>> @@ -154,6 +154,11 @@
> >>>> compatible = "syscon";
> >>>> reg = <0x1c04 0x0020>;
> >>>> };
> >>>> +
> >>>> + scm_conf_pcie: tisyscon@1c24 {
> >>>> + compatible = "syscon";
> >>>> + reg = <0x1c24 0x0024>;
> >>>> + };
> >>>> };
> >>>>
> >>>> cm_core_aon: cm_core_aon@5000 {
> >>>
> >>>
> >>> Why don't you just extend the existing scm_conf1 area? This is not all pcie
> >>> specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
> >>> and MUXSEL_32K_CLKIN.
> >>
> >> scm_conf_pcie has only PCIe registers (it starts at 0x4A003C24).
> >> PLLEN_CONTROL and others are at 0x4A003C14 as per
> >> DRA75x_DRA74x_SR1.1_NDA_TRM_vW.
> >
> > Oh sorry I guess I was looking at a wrong address then.
> >
> >> Since PCIe itself has a bunch of registers for itself, thought of
> >> creating a separate dt node. But I can extend scm_conf1 area.
> >
> > Why not just ioremap them then? Do these need to be shared with
> > some other driver?
>
> yeah, some are used by PCIe controller driver and some are used by PCIe
> PHY driver.
OK makes sense to me then.
Thanks,
Tony
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| From | Kishon Vijay Abraham I <kishon@ti.com> |
|---|---|
| Date | 2015-10-13 00:20 +0200 |
| Message-ID | <qiTBM-3UK-9@gated-at.bofh.it> |
| In reply to | #1245189 |
Hi,
On Tuesday 13 October 2015 03:42 AM, Tony Lindgren wrote:
> * Kishon Vijay Abraham I <kishon@ti.com> [151012 15:09]:
>> Hi,
>>
>> On Tuesday 13 October 2015 03:33 AM, Tony Lindgren wrote:
>>> * Kishon Vijay Abraham I <kishon@ti.com> [151012 14:50]:
>>>> Hi Tony,
>>>>
>>>> On Tuesday 13 October 2015 02:51 AM, Tony Lindgren wrote:
>>>>> * Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
>>>>>> Add new device tree node for the control module register space where
>>>>>> PCIe registers are present.
>>>>>>
>>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>>>>> ---
>>>>>> arch/arm/boot/dts/dra7.dtsi | 5 +++++
>>>>>> 1 file changed, 5 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>>>>> index 5d65db9..0769b5d 100644
>>>>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>>>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>>>>> @@ -154,6 +154,11 @@
>>>>>> compatible = "syscon";
>>>>>> reg = <0x1c04 0x0020>;
>>>>>> };
>>>>>> +
>>>>>> + scm_conf_pcie: tisyscon@1c24 {
>>>>>> + compatible = "syscon";
>>>>>> + reg = <0x1c24 0x0024>;
>>>>>> + };
>>>>>> };
>>>>>>
>>>>>> cm_core_aon: cm_core_aon@5000 {
>>>>>
>>>>>
>>>>> Why don't you just extend the existing scm_conf1 area? This is not all pcie
>>>>> specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
>>>>> and MUXSEL_32K_CLKIN.
>>>>
>>>> scm_conf_pcie has only PCIe registers (it starts at 0x4A003C24).
>>>> PLLEN_CONTROL and others are at 0x4A003C14 as per
>>>> DRA75x_DRA74x_SR1.1_NDA_TRM_vW.
>>>
>>> Oh sorry I guess I was looking at a wrong address then.
>>>
>>>> Since PCIe itself has a bunch of registers for itself, thought of
>>>> creating a separate dt node. But I can extend scm_conf1 area.
>>>
>>> Why not just ioremap them then? Do these need to be shared with
>>> some other driver?
>>
>> yeah, some are used by PCIe controller driver and some are used by PCIe
>> PHY driver.
>
> OK makes sense to me then.
Cool.
Btw the driver modifications has not yet been merged, so don't merge
these yet. I'll repost these once the driver is merged.
Thanks
Kishon
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| From | Tony Lindgren <tony@atomide.com> |
|---|---|
| Date | 2015-10-13 00:30 +0200 |
| Message-ID | <qiTLr-45V-13@gated-at.bofh.it> |
| In reply to | #1245190 |
* Kishon Vijay Abraham I <kishon@ti.com> [151012 15:23]:
> Hi,
>
> On Tuesday 13 October 2015 03:42 AM, Tony Lindgren wrote:
> > * Kishon Vijay Abraham I <kishon@ti.com> [151012 15:09]:
> >> Hi,
> >>
> >> On Tuesday 13 October 2015 03:33 AM, Tony Lindgren wrote:
> >>> * Kishon Vijay Abraham I <kishon@ti.com> [151012 14:50]:
> >>>> Hi Tony,
> >>>>
> >>>> On Tuesday 13 October 2015 02:51 AM, Tony Lindgren wrote:
> >>>>> * Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
> >>>>>> Add new device tree node for the control module register space where
> >>>>>> PCIe registers are present.
> >>>>>>
> >>>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >>>>>> ---
> >>>>>> arch/arm/boot/dts/dra7.dtsi | 5 +++++
> >>>>>> 1 file changed, 5 insertions(+)
> >>>>>>
> >>>>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> >>>>>> index 5d65db9..0769b5d 100644
> >>>>>> --- a/arch/arm/boot/dts/dra7.dtsi
> >>>>>> +++ b/arch/arm/boot/dts/dra7.dtsi
> >>>>>> @@ -154,6 +154,11 @@
> >>>>>> compatible = "syscon";
> >>>>>> reg = <0x1c04 0x0020>;
> >>>>>> };
> >>>>>> +
> >>>>>> + scm_conf_pcie: tisyscon@1c24 {
> >>>>>> + compatible = "syscon";
> >>>>>> + reg = <0x1c24 0x0024>;
> >>>>>> + };
> >>>>>> };
> >>>>>>
> >>>>>> cm_core_aon: cm_core_aon@5000 {
> >>>>>
> >>>>>
> >>>>> Why don't you just extend the existing scm_conf1 area? This is not all pcie
> >>>>> specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
> >>>>> and MUXSEL_32K_CLKIN.
> >>>>
> >>>> scm_conf_pcie has only PCIe registers (it starts at 0x4A003C24).
> >>>> PLLEN_CONTROL and others are at 0x4A003C14 as per
> >>>> DRA75x_DRA74x_SR1.1_NDA_TRM_vW.
> >>>
> >>> Oh sorry I guess I was looking at a wrong address then.
> >>>
> >>>> Since PCIe itself has a bunch of registers for itself, thought of
> >>>> creating a separate dt node. But I can extend scm_conf1 area.
> >>>
> >>> Why not just ioremap them then? Do these need to be shared with
> >>> some other driver?
> >>
> >> yeah, some are used by PCIe controller driver and some are used by PCIe
> >> PHY driver.
> >
> > OK makes sense to me then.
>
> Cool.
>
> Btw the driver modifications has not yet been merged, so don't merge
> these yet. I'll repost these once the driver is merged.
OK thanks.
Tony
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| From | Tony Lindgren <tony@atomide.com> |
|---|---|
| Date | 2015-10-13 00:10 +0200 |
| Message-ID | <qiTs5-3JD-5@gated-at.bofh.it> |
| In reply to | #1245173 |
* Kishon Vijay Abraham I <kishon@ti.com> [151012 14:50]:
> Hi Tony,
>
> On Tuesday 13 October 2015 02:51 AM, Tony Lindgren wrote:
> > * Kishon Vijay Abraham I <kishon@ti.com> [150915 06:37]:
> >> Add new device tree node for the control module register space where
> >> PCIe registers are present.
> >>
> >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >> ---
> >> arch/arm/boot/dts/dra7.dtsi | 5 +++++
> >> 1 file changed, 5 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> >> index 5d65db9..0769b5d 100644
> >> --- a/arch/arm/boot/dts/dra7.dtsi
> >> +++ b/arch/arm/boot/dts/dra7.dtsi
> >> @@ -154,6 +154,11 @@
> >> compatible = "syscon";
> >> reg = <0x1c04 0x0020>;
> >> };
> >> +
> >> + scm_conf_pcie: tisyscon@1c24 {
> >> + compatible = "syscon";
> >> + reg = <0x1c24 0x0024>;
> >> + };
> >> };
> >>
> >> cm_core_aon: cm_core_aon@5000 {
> >
> >
> > Why don't you just extend the existing scm_conf1 area? This is not all pcie
> > specific for scm_conf_pcie, at least for PLLEN_CONTROL, RMII_CLK_SETTING
> > and MUXSEL_32K_CLKIN.
>
> scm_conf_pcie has only PCIe registers (it starts at 0x4A003C24).
> PLLEN_CONTROL and others are at 0x4A003C14 as per
> DRA75x_DRA74x_SR1.1_NDA_TRM_vW.
Oh sorry I guess I was looking at a wrong address then.
> Since PCIe itself has a bunch of registers for itself, thought of
> creating a separate dt node. But I can extend scm_conf1 area.
Why not just ioremap them then? Do these need to be shared with
some other driver?
Regards,
Tony
--
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