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[PATCH v4 0/4] mailbox: hisilicon: add Hi6220 mailbox driver

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  [PATCH v4 0/4] mailbox: hisilicon: add Hi6220 mailbox driver Leo Yan <leo.yan@linaro.org> - 2015-10-12 18:40 +0200
    [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver Leo Yan <leo.yan@linaro.org> - 2015-10-12 18:40 +0200
      Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver Jassi Brar <jassisinghbrar@gmail.com> - 2015-10-16 07:00 +0200
        Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox  driver Leo Yan <leo.yan@linaro.org> - 2015-10-16 07:30 +0200
    [PATCH v4 3/4] arm64: dts: add mailbox node for Hi6220 Leo Yan <leo.yan@linaro.org> - 2015-10-12 18:40 +0200

#1244903 — [PATCH v4 0/4] mailbox: hisilicon: add Hi6220 mailbox driver

Hi6220 mailbox supports up to 32 channels. Each channel is unidirectional
with a maximum message size of 8 words. I/O is performed using register
access (there is no DMA) and the cell raises an interrupt when messages
are received.

This patch series is to implement Hi6220 mailbox driver. It registers
two channels into framework for communication with MCU, one is tx channel
and another is rx channel. Now mailbox driver is used to send message to
MCU to control dynamic voltage and frequency scaling for CPU, GPU and DDR.

Changes from v3:
* The patch series for enabling idle state for Hi6220 has reserved memory
  regions, so this series will not include it anymore
* Refined mailbox driver according to Jassi's suggestion;
  Removed kfifo from mailbox driver;
  Removed spinlock for ipc registers accessing, due every channel has its
  own dedicated bit in ipc register and readl/writel will introduce memory
  barrier, so don't need spinlock to protect ipc registers accessing
* After mailbox driver is ready, can use patch 4 to enable CPU's OPPs and
  stub clock driver; finally can enable CPUFreq driver for CPU frequency
  scaling

Changes from v2:
* Get rid of unused memory regions from memory node in DT, and don't use
  reserved-memory node according to Mark and Leif's suggestion; Haojian also
  has updated UEFI for efi memory info

Changes from v1:
* Correct lock usage for SMP scenario

Changes from RFC:
* According to Jassi's review, totally remove the abstract common driver
  layer and only commit driver dedicated for Hi6220
* According to Paul Bolle's review, fix typo issue for Kconfig and remove
  unnecessary dependency with OF and fix minor for mailbox driver
* Refine a little for dts nodes


Leo Yan (4):
  dt-bindings: mailbox: Document Hi6220 mailbox driver
  mailbox: Hi6220: add mailbox driver
  arm64: dts: add mailbox node for Hi6220
  arm64: dts: add Hi6220's stub clock node

 .../bindings/mailbox/hisilicon,hi6220-mailbox.txt  |  57 ++++
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi          |  31 ++
 drivers/mailbox/Kconfig                            |   8 +
 drivers/mailbox/Makefile                           |   2 +
 drivers/mailbox/hi6220-mailbox.c                   | 371 +++++++++++++++++++++
 5 files changed, 469 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
 create mode 100644 drivers/mailbox/hi6220-mailbox.c

-- 
1.9.1

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#1244906 — [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

Document the new compatible for Hisilicon Hi6220 mailbox driver.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 .../bindings/mailbox/hisilicon,hi6220-mailbox.txt  | 57 ++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt

diff --git a/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt b/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
new file mode 100644
index 0000000..3dfb0b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/hisilicon,hi6220-mailbox.txt
@@ -0,0 +1,57 @@
+Hisilicon Hi6220 Mailbox Driver
+===============================
+
+Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
+is unidirectional with a maximum message size of 8 words. I/O is
+performed using register access (there is no DMA) and the cell
+raises an interrupt when messages are received.
+
+Mailbox Device Node:
+====================
+
+Required properties:
+--------------------
+- compatible:		Shall be "hisilicon,hi6220-mbox"
+- reg:			Contains the mailbox register address range (base
+			address and length); the first item is for IPC
+			registers, the second item is shared buffer for
+			slots.
+- #mbox-cells		Common mailbox binding property to identify the number
+			of cells required for the mailbox specifier. Should be 1.
+- interrupts:		Contains the interrupt information for the mailbox
+			device. The format is dependent on which interrupt
+			controller the SoCs use.
+
+Example:
+--------
+
+	mailbox: mailbox@F7510000 {
+		#mbox-cells = <1>;
+		compatible = "hisilicon,hi6220-mbox";
+		reg = <0x0 0xF7510000 0x0 0x1000>, /* IPC_S */
+		      <0x0 0x06DFF800 0x0 0x0800>; /* Mailbox */
+		interrupt-parent = <&gic>;
+		interrupts = <0 94 4>;
+	};
+
+
+Mailbox client
+===============
+
+"mboxes" and the optional "mbox-names" (please see
+Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
+of the mboxes property should contain a phandle to the mailbox controller
+device node and second argument is the channel index. It must be 0 (hardware
+support only one channel). The equivalent "mbox-names" property value can be
+used to give a name to the communication channel to be used by the client user.
+
+Example:
+--------
+
+	stub_clock: stub_clock {
+		compatible = "hisilicon,hi6220-stub-clk";
+		hisilicon,hi6220-clk-sram = <&sram>;
+		#clock-cells = <1>;
+		mbox-names = "mbox-tx";
+		mboxes = <&mailbox 1>;
+	};
-- 
1.9.1

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#1248335 — Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:

> +
> +Mailbox Device Node:
> +====================
> +
> +Required properties:
> +--------------------
> +- compatible:          Shall be "hisilicon,hi6220-mbox"
> +- reg:                 Contains the mailbox register address range (base
> +                       address and length); the first item is for IPC
> +                       registers, the second item is shared buffer for
> +                       slots.
>
Is the shared-buffer a part of mailbox controller or just regular
memory that could be used for purposes other than mailbox also? If
latter, please remove it from here.

> +Mailbox client
> +===============
> +
> +"mboxes" and the optional "mbox-names" (please see
> +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> +of the mboxes property should contain a phandle to the mailbox controller
> +device node and second argument is the channel index. It must be 0 (hardware
> +support only one channel).
>
sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
and 2 in the driver.
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#1248342 — Re: [PATCH v4 1/4] dt-bindings: mailbox: Document Hi6220 mailbox driver

Hi Jassi,

Thanks for review.

On Fri, Oct 16, 2015 at 10:26:48AM +0530, Jassi Brar wrote:
> On Mon, Oct 12, 2015 at 10:02 PM, Leo Yan <leo.yan@linaro.org> wrote:
> 
> > +
> > +Mailbox Device Node:
> > +====================
> > +
> > +Required properties:
> > +--------------------
> > +- compatible:          Shall be "hisilicon,hi6220-mbox"
> > +- reg:                 Contains the mailbox register address range (base
> > +                       address and length); the first item is for IPC
> > +                       registers, the second item is shared buffer for
> > +                       slots.
> >
> Is the shared-buffer a part of mailbox controller or just regular
> memory that could be used for purposes other than mailbox also? If
> latter, please remove it from here.

The shared-buffer is part of mailbox controller, this region cannot be
dynamically allocated for other purpose; it's hardcode by MCU firmware.

> > +Mailbox client
> > +===============
> > +
> > +"mboxes" and the optional "mbox-names" (please see
> > +Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
> > +of the mboxes property should contain a phandle to the mailbox controller
> > +device node and second argument is the channel index. It must be 0 (hardware
> > +support only one channel).
> >
> sorry, what must be 0?  You have MBOX_CHAN_MAX and MBOX_CHAN_NUM as 32
> and 2 in the driver.

Will fix it.

Thanks,
Leo Yan
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#1244907 — [PATCH v4 3/4] arm64: dts: add mailbox node for Hi6220

This patch add device mailbox node for Hi6220 in DT.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index e83802a..76560fa 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -207,5 +207,13 @@
 			clocks = <&ao_ctrl 27>, <&ao_ctrl 27>;
 			clock-names = "apb_pclk", "apb_pclk";
 		};
+
+		mailbox: mailbox@f7510000 {
+			#mbox-cells = <1>;
+			compatible = "hisilicon,hi6220-mbox";
+			reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
+			      <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */
+			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 };
-- 
1.9.1

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