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[PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors

Started bySrinivas Kandagatla <srinivas.kandagatla@linaro.org>
First post2015-10-09 11:00 +0200
Last post2015-10-13 20:20 +0200
Articles 5 — 2 participants

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  [PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2015-10-09 11:00 +0200
    [PATCH v2 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2015-10-09 11:00 +0200
    [PATCH v2 1/4] arm64: dts: fix i2c pinconf sleep state function Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2015-10-09 11:00 +0200
    [PATCH v2 2/4] arm64: dts: qcom: Add msm8916 I2C nodes. Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2015-10-09 11:00 +0200
    Re: [PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS  connectors Stephen Boyd <sboyd@codeaurora.org> - 2015-10-13 20:20 +0200

#1243147 — [PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2015-10-09 11:00 +0200
Subject[PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors
Message-ID<qhBGW-5Da-15@gated-at.bofh.it>
Hi Andy, 

This patchset adds support for i2c and spi on High-Speed and Low speed
connectors on DB410c.
One of the patch fixes the sleep state of existing i2c node.

thanks,
srini

Changes since v1:
	- removed useless comment spotted by Stephen Boyd.
	- Use absolute names instead of lables for consistency suggested by Stephen Boyd.

Srinivas Kandagatla (4):
  arm64: dts: fix i2c pinconf sleep state function
  arm64: dts: qcom: Add msm8916 I2C nodes.
  arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
  arm64: dts: apq8016-sbc: enable spi buses on LS and HS

 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi  | 25 +++++++++++++++
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 50 +++++++++++++++++++++++++++++-
 arch/arm64/boot/dts/qcom/msm8916.dtsi      | 30 ++++++++++++++++++
 3 files changed, 104 insertions(+), 1 deletion(-)

-- 
1.9.1

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#1243152 — [PATCH v2 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2015-10-09 11:00 +0200
Subject[PATCH v2 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS
Message-ID<qhBGX-5Da-27@gated-at.bofh.it>
In reply to#1243147
This patch enables spi buses on low speed and high speed expansion
connectors on DB410C

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index cd1d0b5..64b06d8 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -49,6 +49,16 @@
 			status = "okay";
 		};
 
+		spi@78b7000 {
+		/* On High speed expansion */
+			status = "okay";
+		};
+
+		spi@78b9000 {
+		/* On Low speed expansion */
+			status = "okay";
+		};
+
 		leds {
 			pinctrl-names = "default";
 			pinctrl-0 = <&msmgpio_leds>,
-- 
1.9.1

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#1243154 — [PATCH v2 1/4] arm64: dts: fix i2c pinconf sleep state function

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2015-10-09 11:00 +0200
Subject[PATCH v2 1/4] arm64: dts: fix i2c pinconf sleep state function
Message-ID<qhBGX-5Da-31@gated-at.bofh.it>
In reply to#1243147
This patch fixes the i2c pinctrl sleep state by changing the pinconf
function to be in gpio mode rather than i2c.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 42941b9..a6105d7 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -279,7 +279,7 @@
 
 	i2c4_sleep: i2c4_sleep {
 		pinmux {
-			function = "blsp_i2c4";
+			function = "gpio";
 			pins = "gpio14", "gpio15";
 		};
 		pinconf {
-- 
1.9.1

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#1243155 — [PATCH v2 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2015-10-09 11:00 +0200
Subject[PATCH v2 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.
Message-ID<qhBGX-5Da-33@gated-at.bofh.it>
In reply to#1243147
This patch adds missing support for i2c0 and i2c6, this support is
required to connect the i2c slaves on LS expansion on DB410c.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 48 ++++++++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/msm8916.dtsi      | 30 +++++++++++++++++++
 2 files changed, 78 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index a6105d7..49ec55a 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -265,6 +265,30 @@
 		};
 	};
 
+	i2c2_default: i2c2_default {
+		pinmux {
+			function = "blsp_i2c2";
+			pins = "gpio6", "gpio7";
+		};
+		pinconf {
+			pins = "gpio6", "gpio7";
+			drive-strength = <2>;
+			bias-disable = <0>;
+		};
+	};
+
+	i2c2_sleep: i2c2_sleep {
+		pinmux {
+			function = "gpio";
+			pins = "gpio6", "gpio7";
+		};
+		pinconf {
+			pins = "gpio6", "gpio7";
+			drive-strength = <2>;
+			bias-disable = <0>;
+		};
+	};
+
 	i2c4_default: i2c4_default {
 		pinmux {
 			function = "blsp_i2c4";
@@ -289,6 +313,30 @@
 		};
 	};
 
+	i2c6_default: i2c6_default {
+		pinmux {
+			function = "blsp_i2c6";
+			pins = "gpio22", "gpio23";
+		};
+		pinconf {
+			pins = "gpio22", "gpio23";
+			drive-strength = <2>;
+			bias-disable = <0>;
+		};
+	};
+
+	i2c6_sleep: i2c6_sleep {
+		pinmux {
+			function = "gpio";
+			pins = "gpio22", "gpio23";
+		};
+		pinconf {
+			pins = "gpio22", "gpio23";
+			drive-strength = <2>;
+			bias-disable = <0>;
+		};
+	};
+
 	sdhc2_cd_pin {
 		sdc2_cd_on: cd_on {
 			pinmux {
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 85f7bee..2c86234 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -233,6 +233,21 @@
 			status = "disabled";
 		};
 
+		blsp_i2c2: i2c@78b6000 {
+			compatible = "qcom,i2c-qup-v2.2.1";
+			reg = <0x78b6000 0x1000>;
+			interrupts = <GIC_SPI 96 0>;
+			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+				<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+			clock-names = "iface", "core";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&i2c2_default>;
+			pinctrl-1 = <&i2c2_sleep>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		blsp_i2c4: i2c@78b8000 {
 			compatible = "qcom,i2c-qup-v2.2.1";
 			reg = <0x78b8000 0x1000>;
@@ -248,6 +263,21 @@
 			status = "disabled";
 		};
 
+		blsp_i2c6: i2c@78ba000 {
+			compatible = "qcom,i2c-qup-v2.2.1";
+			reg = <0x78ba000 0x1000>;
+			interrupts = <GIC_SPI 100 0>;
+			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+				<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+			clock-names = "iface", "core";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&i2c6_default>;
+			pinctrl-1 = <&i2c6_sleep>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sdhc_1: sdhci@07824000 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0x07824900 0x11c>, <0x07824000 0x800>;
-- 
1.9.1

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#1246021 — Re: [PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors

FromStephen Boyd <sboyd@codeaurora.org>
Date2015-10-13 20:20 +0200
SubjectRe: [PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors
Message-ID<qjcl3-642-11@gated-at.bofh.it>
In reply to#1243147
On 10/09/2015 01:53 AM, Srinivas Kandagatla wrote:
> Hi Andy, 
>
> This patchset adds support for i2c and spi on High-Speed and Low speed
> connectors on DB410c.
> One of the patch fixes the sleep state of existing i2c node.
>
> thanks,
> srini
>
> Changes since v1:
> 	- removed useless comment spotted by Stephen Boyd.
> 	- Use absolute names instead of lables for consistency suggested by Stephen Boyd.
>

Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>

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a Linux Foundation Collaborative Project

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