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Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

Started byVinod Koul <vinod.koul@intel.com>
First post2015-10-05 15:40 +0200
Last post2015-10-05 16:20 +0200
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  Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory  Access Engine driver support Vinod Koul <vinod.koul@intel.com> - 2015-10-05 15:40 +0200
    Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory  Access Engine driver support "Koul, Vinod" <vinod.koul@intel.com> - 2015-10-05 16:20 +0200

#1239564 — Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support

FromVinod Koul <vinod.koul@intel.com>
Date2015-10-05 15:40 +0200
SubjectRe: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support
Message-ID<qge9H-je-5@gated-at.bofh.it>
On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> This is the driver for the AXI Central Direct Memory Access (AXI
> CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth
> Direct Memory Access (DMA) between a memory-mapped source address and a
> memory-mapped destination address.

Where is the 1/2 here ? I have only this one in my mails..

-- 
~Vinod

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#1239585

From"Koul, Vinod" <vinod.koul@intel.com>
Date2015-10-05 16:20 +0200
Message-ID<qgeMq-1i4-3@gated-at.bofh.it>
In reply to#1239564
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