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Groups > linux.kernel > #1238374 > unrolled thread

Missing operand for tlbie instruction on Power7

Started byLaura Abbott <labbott@redhat.com>
First post2015-10-02 17:50 +0200
Last post2015-10-04 02:10 +0200
Articles 8 — 4 participants

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  Missing operand for tlbie instruction on Power7 Laura Abbott <labbott@redhat.com> - 2015-10-02 17:50 +0200
    Re: Missing operand for tlbie instruction on Power7 Denis Kirjanov <kda@linux-powerpc.org> - 2015-10-02 21:10 +0200
      Re: Missing operand for tlbie instruction on Power7 Peter Bergner <bergner@vnet.ibm.com> - 2015-10-02 22:20 +0200
        Re: Missing operand for tlbie instruction on Power7 Denis Kirjanov <kda@linux-powerpc.org> - 2015-10-02 23:40 +0200
          Re: Missing operand for tlbie instruction on Power7 Segher Boessenkool <segher@kernel.crashing.org> - 2015-10-03 00:10 +0200
            Re: Missing operand for tlbie instruction on Power7 Laura Abbott <labbott@redhat.com> - 2015-10-03 00:20 +0200
            Re: Missing operand for tlbie instruction on Power7 Peter Bergner <bergner@vnet.ibm.com> - 2015-10-03 04:30 +0200
              Re: Missing operand for tlbie instruction on Power7 Segher Boessenkool <segher@kernel.crashing.org> - 2015-10-04 02:10 +0200

#1238374 — Missing operand for tlbie instruction on Power7

FromLaura Abbott <labbott@redhat.com>
Date2015-10-02 17:50 +0200
SubjectMissing operand for tlbie instruction on Power7
Message-ID<qfaKS-7Fv-19@gated-at.bofh.it>
Hi,

We received a report (https://bugzilla.redhat.com/show_bug.cgi?id=1267395) of bad assembly
when compiling on powerpc with little endian

[labbott@labbott-redhat-machine linux_upstream]$ make ARCH=powerpc CROSS_COMPILE=powerpc64-linux-gnu-
   CHK     include/config/kernel.release
   CHK     include/generated/uapi/linux/version.h
   CHK     include/generated/utsrelease.h
   CHK     include/generated/bounds.h
   CHK     include/generated/timeconst.h
   CHK     include/generated/asm-offsets.h
   CALL    scripts/checksyscalls.sh
   CHK     include/generated/compile.h
   CALL    arch/powerpc/kernel/systbl_chk.sh
   AS      arch/powerpc/kernel/swsusp_asm64.o
arch/powerpc/kernel/swsusp_asm64.S: Assembler messages:
arch/powerpc/kernel/swsusp_asm64.S:188: Error: missing operand
scripts/Makefile.build:294: recipe for target 'arch/powerpc/kernel/swsusp_asm64.o' failed
make[1]: *** [arch/powerpc/kernel/swsusp_asm64.o] Error 1
Makefile:941: recipe for target 'arch/powerpc/kernel' failed
make: *** [arch/powerpc/kernel] Error 2

This problem started happening after a binutils update:

[labbott@labbott-redhat-machine linux_upstream]$ powerpc64-linux-gnu-as --version
GNU assembler version 2.25.1-1.fc22
Copyright (C) 2014 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or later.
This program has absolutely no warranty.
This assembler was configured for a target of `powerpc64-linux-gnu'.
[labbott@labbott-redhat-machine linux_upstream]$

After some discussion with the binutils folks, it turns out that the tlbie
instruction actually requires another operand and binutils was updated to
check for this https://sourceware.org/ml/binutils/2015-05/msg00133.html .

The code sequence in arch/powerpc/include/asm/ppc_asm.h now needs to be updated:

#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
#define tlbia                                   \
         li      r4,1024;                        \
         mtctr   r4;                             \
         lis     r4,KERNELBASE@h;                \
0:      tlbie   r4;                             \
         addi    r4,r4,0x1000;                   \
         bdnz    0b
#endif

I don't know enough ppc assembly to properly fix this but I can test.

Thanks,
Laura

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#1238539

FromDenis Kirjanov <kda@linux-powerpc.org>
Date2015-10-02 21:10 +0200
Message-ID<qfdSq-3Vb-25@gated-at.bofh.it>
In reply to#1238374

[Multipart message — attachments visible in raw view] — view raw

On 10/2/15, Laura Abbott <labbott@redhat.com> wrote:
> Hi,
>
> We received a report (https://bugzilla.redhat.com/show_bug.cgi?id=1267395)
> of bad assembly
> when compiling on powerpc with little endian
>
> [labbott@labbott-redhat-machine linux_upstream]$ make ARCH=powerpc
> CROSS_COMPILE=powerpc64-linux-gnu-
>    CHK     include/config/kernel.release
>    CHK     include/generated/uapi/linux/version.h
>    CHK     include/generated/utsrelease.h
>    CHK     include/generated/bounds.h
>    CHK     include/generated/timeconst.h
>    CHK     include/generated/asm-offsets.h
>    CALL    scripts/checksyscalls.sh
>    CHK     include/generated/compile.h
>    CALL    arch/powerpc/kernel/systbl_chk.sh
>    AS      arch/powerpc/kernel/swsusp_asm64.o
> arch/powerpc/kernel/swsusp_asm64.S: Assembler messages:
> arch/powerpc/kernel/swsusp_asm64.S:188: Error: missing operand
> scripts/Makefile.build:294: recipe for target
> 'arch/powerpc/kernel/swsusp_asm64.o' failed
> make[1]: *** [arch/powerpc/kernel/swsusp_asm64.o] Error 1
> Makefile:941: recipe for target 'arch/powerpc/kernel' failed
> make: *** [arch/powerpc/kernel] Error 2
>
> This problem started happening after a binutils update:
>
> [labbott@labbott-redhat-machine linux_upstream]$ powerpc64-linux-gnu-as
> --version
> GNU assembler version 2.25.1-1.fc22
> Copyright (C) 2014 Free Software Foundation, Inc.
> This program is free software; you may redistribute it under the terms of
> the GNU General Public License version 3 or later.
> This program has absolutely no warranty.
> This assembler was configured for a target of `powerpc64-linux-gnu'.
> [labbott@labbott-redhat-machine linux_upstream]$
>
> After some discussion with the binutils folks, it turns out that the tlbie
> instruction actually requires another operand and binutils was updated to
> check for this https://sourceware.org/ml/binutils/2015-05/msg00133.html .
>
> The code sequence in arch/powerpc/include/asm/ppc_asm.h now needs to be
> updated:
>
> #if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
> #define tlbia                                   \
>          li      r4,1024;                        \
>          mtctr   r4;                             \
>          lis     r4,KERNELBASE@h;                \
> 0:      tlbie   r4;                             \
>          addi    r4,r4,0x1000;                   \
>          bdnz    0b
> #endif
>
> I don't know enough ppc assembly to properly fix this but I can test.

Could you please test the patch attached?



>
> Thanks,
> Laura
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev

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#1238574

FromPeter Bergner <bergner@vnet.ibm.com>
Date2015-10-02 22:20 +0200
Message-ID<qfeYb-5qP-15@gated-at.bofh.it>
In reply to#1238539
On Fri, 2015-10-02 at 22:03 +0300, Denis Kirjanov wrote:
> arch/powerpc/kernel/swsusp_asm64.S: Assembler messages:
>> arch/powerpc/kernel/swsusp_asm64.S:188: Error: missing operand
>> scripts/Makefile.build:294: recipe for target
>> 'arch/powerpc/kernel/swsusp_asm64.o' failed
>> make[1]: *** [arch/powerpc/kernel/swsusp_asm64.o] Error 1
>> Makefile:941: recipe for target 'arch/powerpc/kernel' failed
>> make: *** [arch/powerpc/kernel] Error 2
[snip]
>> I don't know enough ppc assembly to properly fix this but I can test.
> 
> Could you please test the patch attached?
[snip]
> -0:     tlbie   r4;                             \
> +0:     tlbie   r4, 0;                          \

This isn't correct.  With POWER7 and later (which this compile
is, since it's on LE), the tlbie instruction takes two register
operands:

    tlbie RB, RS

The tlbie instruction on pre POWER7 cpus had one required register
operand (RB) and an optional second L operand, where if you omitted
it, it was the same as using "0":

    tlbie RB, L

This is a POWER7 and later build, so your change which adds the "0"
above is really adding r0 for RS.  The new tlbie instruction doesn't
treat r0 specially, so you'll be using whatever random bits which
happen to be in r0 which I don't think that is what you want.


Peter



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#1238629

FromDenis Kirjanov <kda@linux-powerpc.org>
Date2015-10-02 23:40 +0200
Message-ID<qfgdB-78j-15@gated-at.bofh.it>
In reply to#1238574

[Multipart message — attachments visible in raw view] — view raw

On 10/2/15, Peter Bergner <bergner@vnet.ibm.com> wrote:
> On Fri, 2015-10-02 at 22:03 +0300, Denis Kirjanov wrote:
>> arch/powerpc/kernel/swsusp_asm64.S: Assembler messages:
>>> arch/powerpc/kernel/swsusp_asm64.S:188: Error: missing operand
>>> scripts/Makefile.build:294: recipe for target
>>> 'arch/powerpc/kernel/swsusp_asm64.o' failed
>>> make[1]: *** [arch/powerpc/kernel/swsusp_asm64.o] Error 1
>>> Makefile:941: recipe for target 'arch/powerpc/kernel' failed
>>> make: *** [arch/powerpc/kernel] Error 2
> [snip]
>>> I don't know enough ppc assembly to properly fix this but I can test.
>>
>> Could you please test the patch attached?
> [snip]
>> -0:     tlbie   r4;                             \
>> +0:     tlbie   r4, 0;                          \
>
> This isn't correct.  With POWER7 and later (which this compile
> is, since it's on LE), the tlbie instruction takes two register
> operands:
>
>     tlbie RB, RS
>
> The tlbie instruction on pre POWER7 cpus had one required register
> operand (RB) and an optional second L operand, where if you omitted
> it, it was the same as using "0":
>
>     tlbie RB, L
>
> This is a POWER7 and later build, so your change which adds the "0"
> above is really adding r0 for RS.  The new tlbie instruction doesn't
> treat r0 specially, so you'll be using whatever random bits which
> happen to be in r0 which I don't think that is what you want.

Ok, than we can just zero out r5 for example and use it in tlbie as RS,
right?


>
>
> Peter
>
>
>
>

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#1238645

FromSegher Boessenkool <segher@kernel.crashing.org>
Date2015-10-03 00:10 +0200
Message-ID<qfgGB-7W4-1@gated-at.bofh.it>
In reply to#1238629
On Sat, Oct 03, 2015 at 12:37:35AM +0300, Denis Kirjanov wrote:
> >> -0:     tlbie   r4;                             \
> >> +0:     tlbie   r4, 0;                          \
> >
> > This isn't correct.  With POWER7 and later (which this compile
> > is, since it's on LE), the tlbie instruction takes two register
> > operands:
> >
> >     tlbie RB, RS
> >
> > The tlbie instruction on pre POWER7 cpus had one required register
> > operand (RB) and an optional second L operand, where if you omitted
> > it, it was the same as using "0":
> >
> >     tlbie RB, L
> >
> > This is a POWER7 and later build, so your change which adds the "0"
> > above is really adding r0 for RS.  The new tlbie instruction doesn't
> > treat r0 specially, so you'll be using whatever random bits which
> > happen to be in r0 which I don't think that is what you want.
> 
> Ok, than we can just zero out r5 for example and use it in tlbie as RS,
> right?

That won't assemble _unless_ your assembler is in POWER7 mode.  It also
won't do the right thing at run time on older machines.

Where is this tlbia macro used at all, for 64-bit machines?


Segher
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#1238658

FromLaura Abbott <labbott@redhat.com>
Date2015-10-03 00:20 +0200
Message-ID<qfgQi-87k-17@gated-at.bofh.it>
In reply to#1238645
On 10/02/2015 03:00 PM, Segher Boessenkool wrote:
> On Sat, Oct 03, 2015 at 12:37:35AM +0300, Denis Kirjanov wrote:
>>>> -0:     tlbie   r4;                             \
>>>> +0:     tlbie   r4, 0;                          \
>>>
>>> This isn't correct.  With POWER7 and later (which this compile
>>> is, since it's on LE), the tlbie instruction takes two register
>>> operands:
>>>
>>>      tlbie RB, RS
>>>
>>> The tlbie instruction on pre POWER7 cpus had one required register
>>> operand (RB) and an optional second L operand, where if you omitted
>>> it, it was the same as using "0":
>>>
>>>      tlbie RB, L
>>>
>>> This is a POWER7 and later build, so your change which adds the "0"
>>> above is really adding r0 for RS.  The new tlbie instruction doesn't
>>> treat r0 specially, so you'll be using whatever random bits which
>>> happen to be in r0 which I don't think that is what you want.
>>
>> Ok, than we can just zero out r5 for example and use it in tlbie as RS,
>> right?
>
> That won't assemble _unless_ your assembler is in POWER7 mode.  It also
> won't do the right thing at run time on older machines.
>
> Where is this tlbia macro used at all, for 64-bit machines?
>


[labbott@labbott-redhat-machine linux_upstream]$ make ARCH=powerpc CROSS_COMPILE=powerpc64-linux-gnu-
   CHK     include/config/kernel.release
   CHK     include/generated/uapi/linux/version.h
   CHK     include/generated/utsrelease.h
   CHK     include/generated/bounds.h
   CHK     include/generated/timeconst.h
   CHK     include/generated/asm-offsets.h
   CALL    scripts/checksyscalls.sh
   CHK     include/generated/compile.h
   CALL    arch/powerpc/kernel/systbl_chk.sh
   AS      arch/powerpc/kernel/swsusp_asm64.o
arch/powerpc/kernel/swsusp_asm64.S: Assembler messages:
arch/powerpc/kernel/swsusp_asm64.S:188: Error: missing operand
scripts/Makefile.build:294: recipe for target 'arch/powerpc/kernel/swsusp_asm64.o' failed
make[1]: *** [arch/powerpc/kernel/swsusp_asm64.o] Error 1
Makefile:941: recipe for target 'arch/powerpc/kernel' failed
make: *** [arch/powerpc/kernel] Error 2

This is piece of code protected by CONFIG_PPC_BOOK3S_64.
  
>
> Segher
>

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#1238719

FromPeter Bergner <bergner@vnet.ibm.com>
Date2015-10-03 04:30 +0200
Message-ID<qfkKe-5fi-1@gated-at.bofh.it>
In reply to#1238645
On Fri, 2015-10-02 at 17:00 -0500, Segher Boessenkool wrote:
> On Sat, Oct 03, 2015 at 12:37:35AM +0300, Denis Kirjanov wrote:
> > >> -0:     tlbie   r4;                             \
> > >> +0:     tlbie   r4, 0;                          \
> > >
> > > This isn't correct.  With POWER7 and later (which this compile
> > > is, since it's on LE), the tlbie instruction takes two register
> > > operands:
> > >
> > >     tlbie RB, RS
> > >
> > > The tlbie instruction on pre POWER7 cpus had one required register
> > > operand (RB) and an optional second L operand, where if you omitted
> > > it, it was the same as using "0":
> > >
> > >     tlbie RB, L
> > >
> > > This is a POWER7 and later build, so your change which adds the "0"
> > > above is really adding r0 for RS.  The new tlbie instruction doesn't
> > > treat r0 specially, so you'll be using whatever random bits which
> > > happen to be in r0 which I don't think that is what you want.
> > 
> > Ok, than we can just zero out r5 for example and use it in tlbie as RS,
> > right?
> 
> That won't assemble _unless_ your assembler is in POWER7 mode.  It also
> won't do the right thing at run time on older machines.

Correct, getting this to work on both pre-power7 and power7 and later
is tricky.  One really horrible hack would be to do:

  li r0,0
  tlbie r4,0

On pre-power7, the "0" will be taken as a zero L operand and on
power7 and later, it'll be r0, but with a zero value we loaded in
the insn before.  I know, really ugly. :-)

Peter


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#1239024

FromSegher Boessenkool <segher@kernel.crashing.org>
Date2015-10-04 02:10 +0200
Message-ID<qfF2h-El-1@gated-at.bofh.it>
In reply to#1238719
On Fri, Oct 02, 2015 at 09:24:46PM -0500, Peter Bergner wrote:
> > > Ok, than we can just zero out r5 for example and use it in tlbie as RS,
> > > right?
> > 
> > That won't assemble _unless_ your assembler is in POWER7 mode.  It also
> > won't do the right thing at run time on older machines.
> 
> Correct, getting this to work on both pre-power7 and power7 and later
> is tricky.  One really horrible hack would be to do:
> 
>   li r0,0
>   tlbie r4,0
> 
> On pre-power7, the "0" will be taken as a zero L operand and on
> power7 and later, it'll be r0, but with a zero value we loaded in
> the insn before.  I know, really ugly. :-)

Hide the "li 0,0" somewhere earlier, and write it as "tlbie 4,0", and
don't write a comment -- we *like* tricky!

It should really be a separate macro define for power7 and 4xx etc.;
and the macro should not be called "tlbia", but something that makes
it obvious at the usage sites that it is in fact a macro; and why a
macro anyway, a function call might be better here?


Segher
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