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| Started by | Greg KH <gregkh@linuxfoundation.org> |
|---|---|
| First post | 2015-10-04 19:40 +0200 |
| Last post | 2015-10-04 19:40 +0200 |
| Articles | 1 — 1 participant |
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Re: [v5] serial: 8250_dw: Add support for big-endian MMIO accesses Greg KH <gregkh@linuxfoundation.org> - 2015-10-04 19:40 +0200
| From | Greg KH <gregkh@linuxfoundation.org> |
|---|---|
| Date | 2015-10-04 19:40 +0200 |
| Subject | Re: [v5] serial: 8250_dw: Add support for big-endian MMIO accesses |
| Message-ID | <qfVqp-772-19@gated-at.bofh.it> |
On Tue, Aug 25, 2015 at 11:57:09AM +0300, Noam Camus wrote:
> From: Noam Camus <noamc@ezchip.com>
>
> Add support for UPIO_MEM32BE in addition to UPIO_MEM32.
> dw8250_serial_out32() extra functionality that is not part of
> the 8250 core driver was moved to new function called
> dw8250_check_LCR().
>
> For big endian we use 2 new accessors similar to little endian,
> called dw8250_serial_out32be() and dw8250_serial_in32be().
> Both little and big endian accessors use dw8250_check_LCR()
> for their dw8250_serial_out32{,be}().
>
> In addition I added another 2 accessors inside private_data field of
> uart_port. This second level accessors are set during probe in
> private_data field of uart_port. Now any direct call to readl/writel
> is replaced with those accessors which are endianness aware.
>
> Last issue:
> readl() for UCV and CPR will not work for port type UPIO_MEM32BE.
> Instead we use the serial_in32() accessor which is initialized
> properly according to endianness.
>
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> ---
> drivers/tty/serial/8250/8250_dw.c | 72 ++++++++++++++++++++++++++++++++-----
> 1 files changed, 63 insertions(+), 9 deletions(-)
This doesn't apply to my tree at all anymore, what did you make it
against?
Can you please respin it and resend?
thanks,
greg k-h
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