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[RESEND PATCH 1/1] ASoC: dwc: correct irq clear method

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  [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method "yitian" <yitian.bu@tangramtek.com> - 2015-09-29 16:50 +0200
    Re: [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method Mark Brown <broonie@kernel.org> - 2015-09-30 20:20 +0200
      RE: [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method "yitian" <yitian.bu@tangramtek.com> - 2015-10-01 04:50 +0200
        Re: [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method Mark Brown <broonie@kernel.org> - 2015-10-01 12:10 +0200
          RE: [alsa-devel] [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method "yitian" <yitian.bu@tangramtek.com> - 2015-10-02 09:30 +0200

#1235180 — [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method

from Designware I2S datasheet, irq is cleared by reading from
TOR/ROR registers, rather than by writing into them.

Signed-off-by: Yitian Bu <yitian.bu@tangramtek.com>
---
 sound/soc/dwc/designware_i2s.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index a3e97b4..0d28e3b 100644
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -131,10 +131,10 @@ static inline void i2s_clear_irqs(struct dw_i2s_dev
*dev, u32 stream)
 
 	if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		for (i = 0; i < 4; i++)
-			i2s_write_reg(dev->i2s_base, TOR(i), 0);
+			i2s_read_reg(dev->i2s_base, TOR(i));
 	} else {
 		for (i = 0; i < 4; i++)
-			i2s_write_reg(dev->i2s_base, ROR(i), 0);
+			i2s_read_reg(dev->i2s_base, ROR(i));
 	}
 }
 
-- 
1.7.12.4

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#1236611

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On Tue, Sep 29, 2015 at 10:39:00PM +0800, yitian wrote:
> from Designware I2S datasheet, irq is cleared by reading from
> TOR/ROR registers, rather than by writing into them.

This doesn't apply against current code, please check and resend.

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#1236914

> From: linux-arm-kernel
> [mailto:linux-arm-kernel-bounces@lists.infradead.org] On Behalf Of Mark
> Brown
> Sent: Thursday, October 1, 2015 2:18 AM
> To: yitian <yitian.bu@tangramtek.com>
> Cc: alsa-devel@alsa-project.org; wsa@the-dreams.de;
> linux-kernel@vger.kernel.org; Andrew.Jackson@arm.com; tiwai@suse.com;
> lgirdwood@gmail.com; perex@perex.cz;
> linux-arm-kernel@lists.infradead.org
> Subject: Re: [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method
> 
> On Tue, Sep 29, 2015 at 10:39:00PM +0800, yitian wrote:
> > from Designware I2S datasheet, irq is cleared by reading from
> > TOR/ROR registers, rather than by writing into them.
> 
> This doesn't apply against current code, please check and resend.
Hi Mark:

Thanks for your comments.
Maybe I misunderstand your meaning. Please correct me.

I synced up to latest kernel branch, the code is the same as what this patch
was
generated.

I checked designware I2S spec "version 1.08a June 2014", it specified that
the TOR
and ROR registers are read only and reading the last bit will clear tx/rx
overrun irq.

Also I have checked this register by writing its last bit, the overrun irq
is not cleared.
But if I read the last bit, the overrun irq is cleared. That means the spec
is correct.

Can you please let me know what else I should double check? Thanks.


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#1237242

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On Thu, Oct 01, 2015 at 10:39:09AM +0800, yitian wrote:

> > This doesn't apply against current code, please check and resend.

> I synced up to latest kernel branch, the code is the same as what this patch
> was
> generated.

The "latest kernel branch" was neither v4.3-rc1 nor my for-next
branch, at least as far as git am was concerned, so I couldn't apply the
patch.

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#1238006 — RE: [alsa-devel] [RESEND PATCH 1/1] ASoC: dwc: correct irq clear method

Hi Mark:
> From: alsa-devel-bounces@alsa-project.org
> [mailto:alsa-devel-bounces@alsa-project.org] On Behalf Of Mark Brown
> Sent: Thursday, October 1, 2015 6:04 PM
> To: yitian <yitian.bu@tangramtek.com>
> Cc: alsa-devel@alsa-project.org; wsa@the-dreams.de;
> linux-kernel@vger.kernel.org; Andrew.Jackson@arm.com;
> lgirdwood@gmail.com; tiwai@suse.com;
> linux-arm-kernel@lists.infradead.org
> Subject: Re: [alsa-devel] [RESEND PATCH 1/1] ASoC: dwc: correct irq clear
> method
> 
> On Thu, Oct 01, 2015 at 10:39:09AM +0800, yitian wrote:
> 
> > > This doesn't apply against current code, please check and resend.
> 
> > I synced up to latest kernel branch, the code is the same as what this
> patch
> > was
> > generated.
> 
> The "latest kernel branch" was neither v4.3-rc1 nor my for-next
> branch, at least as far as git am was concerned, so I couldn't apply the
> patch.

I am sorry.
I used Linux v4.3-rc3 to generate the patch, and I assumed that was the same
as v4.3-rc1.
I generated new patch based on next-20151001, please review it again,
thanks.

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