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Re: [PATCH 07/22] arm64: Keep track of CPU feature registers

Started byDave Martin <Dave.Martin@arm.com>
First post2015-09-25 13:40 +0200
Last post2015-09-25 15:10 +0200
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  Re: [PATCH 07/22] arm64: Keep track of CPU feature registers Dave Martin <Dave.Martin@arm.com> - 2015-09-25 13:40 +0200
    Re: [PATCH 07/22] arm64: Keep track of CPU feature registers "Suzuki K. Poulose" <Suzuki.Poulose@arm.com> - 2015-09-25 15:10 +0200

#1232731 — Re: [PATCH 07/22] arm64: Keep track of CPU feature registers

FromDave Martin <Dave.Martin@arm.com>
Date2015-09-25 13:40 +0200
SubjectRe: [PATCH 07/22] arm64: Keep track of CPU feature registers
Message-ID<qczw7-8vk-23@gated-at.bofh.it>
On Wed, Sep 16, 2015 at 03:21:05PM +0100, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
> 
> This patch adds an infrastructure to keep track of the CPU feature
> registers on the system. For each register, the infrastructure keeps
> track of the system wide safe value of the feature bits. Also, tracks
> the which fields of a register should be matched strictly across all
> the CPUs on the system for the SANITY check infrastructure.
> 
> The feature bits are classified as one of SCALAR_MIN, SCALAR_MAX and DISCRETE
> depending on the implication of the possible values. This information
> is used to decide the safe value for a feature.
> 
> SCALAR_MIN - The smaller value is safer
> SCALAR_MAX - The bigger value is safer
> DISCRETE - We can't decide between the two, so a predefined safe_value is used.

Can documentation of the meanings of these be added somewhere in the
relevant header or in Documentation?

Cheers
---Dave

[...]

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#1232789

From"Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
Date2015-09-25 15:10 +0200
Message-ID<qcAVd-2gw-39@gated-at.bofh.it>
In reply to#1232731
On 25/09/15 12:38, Dave P Martin wrote:
> On Wed, Sep 16, 2015 at 03:21:05PM +0100, Suzuki K. Poulose wrote:
>> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
>>
>> This patch adds an infrastructure to keep track of the CPU feature
>> registers on the system. For each register, the infrastructure keeps
>> track of the system wide safe value of the feature bits. Also, tracks
>> the which fields of a register should be matched strictly across all
>> the CPUs on the system for the SANITY check infrastructure.
>>
>> The feature bits are classified as one of SCALAR_MIN, SCALAR_MAX and DISCRETE
>> depending on the implication of the possible values. This information
>> is used to decide the safe value for a feature.
>>
>> SCALAR_MIN - The smaller value is safer
>> SCALAR_MAX - The bigger value is safer
>> DISCRETE - We can't decide between the two, so a predefined safe_value is used.
>
> Can documentation of the meanings of these be added somewhere in the
> relevant header or in Documentation?

Sure. They were part of the initial draft and eventually lost them over the
reworks. I will add them back, since there is wider use of the information
across the system, from what I started with(i.e, Userspace visibility).

Cheers
Suzuki

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