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Groups > linux.kernel > #1231886 > unrolled thread

[PATCH 00/10] Fix AMD IOMMU faults in kdump kernel

Started byBaoquan He <bhe@redhat.com>
First post2015-09-24 08:40 +0200
Last post2015-09-24 08:50 +0200
Articles 8 — 2 participants

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Contents

  [PATCH 00/10] Fix AMD IOMMU faults in kdump kernel Baoquan He <bhe@redhat.com> - 2015-09-24 08:40 +0200
    [PATCH 04/10] iommu/amd: Detect pre enabled translation Baoquan He <bhe@redhat.com> - 2015-09-24 08:40 +0200
    [PATCH 09/10] iommu/amd: Clear the iommu pre enabled setting Baoquan He <bhe@redhat.com> - 2015-09-24 08:40 +0200
      Re: [PATCH 09/10] iommu/amd: Clear the iommu pre enabled setting Joerg Roedel <joro@8bytes.org> - 2015-09-29 18:20 +0200
    [PATCH 08/10] iommu/amd: Do not update the information of domain to devtables before device driver init Baoquan He <bhe@redhat.com> - 2015-09-24 08:40 +0200
    [PATCH 05/10] iommu/amd: Add function copy_dev_tables Baoquan He <bhe@redhat.com> - 2015-09-24 08:50 +0200
    [PATCH 02/10] iommu/amd: Adjust functons which get first/last devid by reading pci config Baoquan He <bhe@redhat.com> - 2015-09-24 08:50 +0200
    [PATCH 03/10] iommu/amd: Get the first/last device of iommu earlier Baoquan He <bhe@redhat.com> - 2015-09-24 08:50 +0200

#1231886 — [PATCH 00/10] Fix AMD IOMMU faults in kdump kernel

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:40 +0200
Subject[PATCH 00/10] Fix AMD IOMMU faults in kdump kernel
Message-ID<qc8md-3vB-3@gated-at.bofh.it>
This is a draft patchset trying to fix the issue that AMD IOMMU doesn't
work well in kdump kernel. The patch arrangement is not foraml, just
presenting what I have done and what's the problem being encountered
currently.


It contains 3 parts.

1) Clean up patch
  Patch 1/10, 2/10, 3/10 are code clean up patches, which later part will
  be based on.

2) IO page mapping
  Patch 4/10 ~ 9/10
 .> Checking if it's in kdump kernel and previously enabled
 .> If yes do below operatons:
        .> Do not disable amd iommu and do not touch dev tables before coping old dev tables
        .> Copy dev table form old kernel and set the old domain id in amd_iommu_pd_alloc_bitmap
        .> Don't call update_domain() to set domain->pt_root to dev entries before device driver initialization. 
        .> Reset the pre-enabled status when the first __map_single() is called during device driver init

3)interrupt remapping
  Patch 10/10
 .> I didn't think of this well. Now I only copy the old irq table when it first calls get_irq_table().
  This need people's suggestion. Maybe not correct old irq table copy cause kdump kernel hang.

Now there are several problems I got:
Now there's always a hang when go into kdump kernel so that I can't test
futher if command buffer/envent buffer need be copied and where flush need
be called.

Kdump kernel hang and dump the call trace to show it happened in check_timer.
This is similar as people found when they debugged intel iommu issue.
http://lists.infradead.org/pipermail/kexec/2014-December/013137.html

[   12.296525] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
[   12.302513] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.2.0+ #18
[   12.308500] Hardware name: AMD Dinar/Dinar, BIOS RDN1505B 06/05/2013
[   12.314832]  0000000000000000 0000000085c693e9 ffff880030d6fd58
ffffffff8139746f
[   12.322239]  00000000000000a0 ffff880030d6fd90 ffffffff814b4813
ffff880030d283c0
[   12.329645]  ffff880030d2e100 0000000000000002 0000000000000000
ffff880030c29808
[   12.337052] Call Trace:
[   12.339493]  [<ffffffff8139746f>] dump_stack+0x44/0x55
[   12.344616]  [<ffffffff814b4813>] modify_irte+0x23/0xc0
[   12.349827]  [<ffffffff814b48cc>] irq_remapping_deactivate+0x1c/0x20
[   12.356162]  [<ffffffff814b48de>] irq_remapping_activate+0xe/0x10
[   12.362238]  [<ffffffff810fa6b1>] irq_domain_activate_irq+0x41/0x50
[   12.368486]  [<ffffffff810fa69b>] irq_domain_activate_irq+0x2b/0x50
[   12.374736]  [<ffffffff81d6ccbb>] setup_IO_APIC+0x33e/0x7e4
[   12.380294]  [<ffffffff81052039>] ? clear_IO_APIC+0x39/0x60
[   12.385853]  [<ffffffff81d6b82c>] apic_bsp_setup+0xa1/0xac
[   12.391323]  [<ffffffff81d69463>] native_smp_prepare_cpus+0x25f/0x2db
[   12.397747]  [<ffffffff81d550ee>] kernel_init_freeable+0xc9/0x228
[   12.403824]  [<ffffffff81762370>] ? rest_init+0x80/0x80
[   12.409034]  [<ffffffff8176237e>] kernel_init+0xe/0xe0
[   12.414158]  [<ffffffff8176e19f>] ret_from_fork+0x3f/0x70
[   12.419541]  [<ffffffff81762370>] ? rest_init+0x80/0x80
[   12.424751]   modify_irte     devid: 00:14.0 index: 2, vector:48
[   12.440491] Kernel panic - not syncing: timer doesn't work through
Interrupt-remapped IO-APIC
[   12.449022] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.2.0+ #18
[   12.455008] Hardware name: AMD Dinar/Dinar, BIOS RDN1505B 06/05/2013
[   12.461340]  0000000000000000 0000000085c693e9 ffff880030d6fd58
ffffffff8139746f
[   12.468753]  ffffffff81a3cdf8 ffff880030d6fde0 ffffffff8119e921
0000000000000008
[   12.476165]  ffff880030d6fdf0 ffff880030d6fd88 0000000085c693e9
ffffffff813a41b5
[   12.483577] Call Trace:
[   12.486018]  [<ffffffff8139746f>] dump_stack+0x44/0x55
[   12.491142]  [<ffffffff8119e921>] panic+0xd3/0x20b
[   12.495919]  [<ffffffff813a41b5>] ? delay_tsc+0x25/0x60
[   12.501129]  [<ffffffff814bfaba>] panic_if_irq_remap+0x1a/0x20
[   12.506947]  [<ffffffff81d6ccf2>] setup_IO_APIC+0x375/0x7e4
[   12.512503]  [<ffffffff81052039>] ? clear_IO_APIC+0x39/0x60
[   12.518060]  [<ffffffff81d6b82c>] apic_bsp_setup+0xa1/0xac
[   12.523530]  [<ffffffff81d69463>] native_smp_prepare_cpus+0x25f/0x2db
[   12.529952]  [<ffffffff81d550ee>] kernel_init_freeable+0xc9/0x228
[   12.536030]  [<ffffffff81762370>] ? rest_init+0x80/0x80
[   12.541238]  [<ffffffff8176237e>] kernel_init+0xe/0xe0
[   12.546361]  [<ffffffff8176e19f>] ret_from_fork+0x3f/0x70
[   12.551745]  [<ffffffff81762370>] ? rest_init+0x80/0x80
[   12.556957] Rebooting in 10 seconds..
The problem happened in check_timer(). Seems timer interrupt doesn't
work well after modify_irte(). I don't know why it happened. Though I
have copied the old irte tables.

Baoquan He (10):
  iommu/amd: Use standard bitmap operation to set bitmap
  iommu/amd: Adjust functons which get first/last devid by reading pci
    config
  iommu/amd: Get the first/last device of iommu earlier
  iommu/amd: Detect pre enabled translation
  iommu/amd: Add function copy_dev_tables
  iommu/amd: Add functions copy_command_buffer/copy_event_buffer
  iommu/amd: copy old dev tables and do not change it
  iommu/amd: Do not update the information of domain to devtables before
    device driver init
  iommu/amd: Clear the iommu pre enabled setting
  iommu/amd: Copy the old ir table

 drivers/iommu/amd_iommu.c       |  31 ++++--
 drivers/iommu/amd_iommu_init.c  | 205 +++++++++++++++++++++++++++++++---------
 drivers/iommu/amd_iommu_proto.h |   4 +
 drivers/iommu/amd_iommu_types.h |   3 +
 4 files changed, 189 insertions(+), 54 deletions(-)

-- 
2.4.0

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#1231887 — [PATCH 04/10] iommu/amd: Detect pre enabled translation

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:40 +0200
Subject[PATCH 04/10] iommu/amd: Detect pre enabled translation
Message-ID<qc8me-3vB-13@gated-at.bofh.it>
In reply to#1231886
Add functions to check whether translation is already enabled in IOMMU.
Maybe it need be checked per IOMMU. Currently for debugging I didn't do
like that.

Signed-off-by: Baoquan He <bhe@redhat.com>
---
 drivers/iommu/amd_iommu_init.c  | 26 ++++++++++++++++++++++++++
 drivers/iommu/amd_iommu_proto.h |  4 ++++
 2 files changed, 30 insertions(+)

diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 5845918..1fc369e 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -229,6 +229,27 @@ static int amd_iommu_enable_interrupts(void);
 static int __init iommu_go_to_state(enum iommu_init_state state);
 static void init_device_table_dma(void);
 
+static u8 g_pre_enabled;
+
+bool translation_pre_enabled(void)
+{
+        return !!g_pre_enabled;
+}
+
+void clear_translation_pre_enabled(void)
+{
+        g_pre_enabled = 0;
+}
+
+static void init_translation_status(struct amd_iommu *iommu)
+{
+        u32 ctrl;
+
+        ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
+        if (ctrl & (1<<CONTROL_IOMMU_EN))
+                g_pre_enabled = 1;
+}
+
 static inline void update_last_devid(u16 devid)
 {
 	if (devid > amd_iommu_last_bdf)
@@ -1142,6 +1163,11 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
 
 	iommu->int_enabled = false;
 
+	init_translation_status(iommu);
+
+	if (translation_pre_enabled())
+		pr_warn("Translation is already enabled - trying to copy translation structures\n");
+
 	ret = init_iommu_from_acpi(iommu, h);
 	if (ret)
 		return ret;
diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h
index 0bd9eb3..743e209 100644
--- a/drivers/iommu/amd_iommu_proto.h
+++ b/drivers/iommu/amd_iommu_proto.h
@@ -98,4 +98,8 @@ static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
 	return !!(iommu->features & f);
 }
 
+/* kdump checking  */
+extern bool translation_pre_enabled(void);
+extern void clear_translation_pre_enabled(void);
+
 #endif /* _ASM_X86_AMD_IOMMU_PROTO_H  */
-- 
2.4.0

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#1231888 — [PATCH 09/10] iommu/amd: Clear the iommu pre enabled setting

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:40 +0200
Subject[PATCH 09/10] iommu/amd: Clear the iommu pre enabled setting
Message-ID<qc8me-3vB-17@gated-at.bofh.it>
In reply to#1231886
In the first 
Now any change of domain can be updated to dev tables and io page table

Signed-off-by: Baoquan He <bhe@redhat.com>
---
 drivers/iommu/amd_iommu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index aee1ae4..1e86f4c 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2469,6 +2469,8 @@ static dma_addr_t __map_single(struct device *dev,
 	unsigned long align_mask = 0;
 	int i;
 
+	if (translation_pre_enabled())
+		clear_translation_pre_enabled();
 	pages = iommu_num_pages(paddr, size, PAGE_SIZE);
 	paddr &= PAGE_MASK;
 
-- 
2.4.0

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#1235359 — Re: [PATCH 09/10] iommu/amd: Clear the iommu pre enabled setting

FromJoerg Roedel <joro@8bytes.org>
Date2015-09-29 18:20 +0200
SubjectRe: [PATCH 09/10] iommu/amd: Clear the iommu pre enabled setting
Message-ID<qe5Nf-38N-9@gated-at.bofh.it>
In reply to#1231888
On Thu, Sep 24, 2015 at 02:37:35PM +0800, Baoquan He wrote:
> @@ -2469,6 +2469,8 @@ static dma_addr_t __map_single(struct device *dev,
>  	unsigned long align_mask = 0;
>  	int i;
>  
> +	if (translation_pre_enabled())
> +		clear_translation_pre_enabled();

There is probably a better place to do this somewhere in the
initialization state machine of the AMD IOMMU driver.


	Joerg

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#1231889 — [PATCH 08/10] iommu/amd: Do not update the information of domain to devtables before device driver init

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:40 +0200
Subject[PATCH 08/10] iommu/amd: Do not update the information of domain to devtables before device driver init
Message-ID<qc8me-3vB-15@gated-at.bofh.it>
In reply to#1231886
update_domain() is the only place where domain->pt_root will be got and
set into dev entry. So before the device driver initialization we do
nothing if it's in previously enabled translation status.

Signed-off-by: Baoquan He <bhe@redhat.com>
---
 drivers/iommu/amd_iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 0d59f79..aee1ae4 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2350,7 +2350,7 @@ static void update_device_table(struct protection_domain *domain)
 
 static void update_domain(struct protection_domain *domain)
 {
-	if (!domain->updated)
+	if (!domain->updated || translation_pre_enabled())
 		return;
 
 	update_device_table(domain);
-- 
2.4.0

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#1231892 — [PATCH 05/10] iommu/amd: Add function copy_dev_tables

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:50 +0200
Subject[PATCH 05/10] iommu/amd: Add function copy_dev_tables
Message-ID<qc8vT-3GJ-7@gated-at.bofh.it>
In reply to#1231886
Signed-off-by: Baoquan He <bhe@redhat.com>
---
 drivers/iommu/amd_iommu_init.c  | 26 ++++++++++++++++++++++++++
 drivers/iommu/amd_iommu_types.h |  2 ++
 2 files changed, 28 insertions(+)

diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 1fc369e..913a718 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -690,6 +690,32 @@ static void iommu_enable_gt(struct amd_iommu *iommu)
 	iommu_feature_enable(iommu, CONTROL_GT_EN);
 }
 
+static void copy_dev_tables(void)
+{
+        u64 entry;
+        u32 lo, hi;
+        phys_addr_t old_devtb_phys;
+        struct dev_table_entry *old_devtb;
+        struct amd_iommu *iommu;
+        u16 dom_id;
+        u32 devid;
+
+        for_each_iommu(iommu) {
+                lo = readl(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET);
+                hi = readl(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET + 4);
+                entry = (((u64) hi) << 32) + lo;
+                old_devtb_phys = entry & PAGE_MASK;
+                old_devtb = ioremap_cache(old_devtb_phys, dev_table_size);
+                for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
+                        amd_iommu_dev_table[devid] = old_devtb[devid];
+                        dom_id = amd_iommu_dev_table[devid].data[1] & DEV_DOMID_MASK;
+                        __set_bit(dom_id, amd_iommu_pd_alloc_bitmap);
+                }
+                iounmap(old_devtb);
+        }
+
+}
+
 /* sets a specific bit in the device table entry. */
 static void set_dev_entry_bit(u16 devid, u8 bit)
 {
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index f659088..d0f0cfb 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -194,6 +194,8 @@
 #define DEV_ENTRY_MODE_MASK	0x07
 #define DEV_ENTRY_MODE_SHIFT	0x09
 
+#define DEV_DOMID_MASK        0xffff
+
 #define MAX_DEV_TABLE_ENTRIES	0xffff
 
 /* constants to configure the command buffer */
-- 
2.4.0

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#1231894 — [PATCH 02/10] iommu/amd: Adjust functons which get first/last devid by reading pci config

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:50 +0200
Subject[PATCH 02/10] iommu/amd: Adjust functons which get first/last devid by reading pci config
Message-ID<qc8vU-3GJ-11@gated-at.bofh.it>
In reply to#1231886
The old functon find_last_devid_on_pci not only gets the last devid, but calls
update_last_devid(). Now adjust the function definition to make it be consistent
with its name. Meanwhile add a new function find_first_devid_on_pci for later use.

Signed-off-by: Baoquan He <bhe@redhat.com>
---
 drivers/iommu/amd_iommu_init.c | 37 +++++++++++++++++++++++++++----------
 1 file changed, 27 insertions(+), 10 deletions(-)

diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 286da26..be20a56 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -412,14 +412,32 @@ static inline int ivhd_entry_length(u8 *ivhd)
  * This function reads the last device id the IOMMU has to handle from the PCI
  * capability header for this IOMMU
  */
-static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr)
+static int __init find_first_devid_on_pci(struct ivhd_header *h)
 {
-	u32 cap;
+	u32 range;
 
-	cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET);
-	update_last_devid(PCI_DEVID(MMIO_GET_BUS(cap), MMIO_GET_LD(cap)));
+	range = read_pci_config(PCI_BUS_NUM(h->devid),
+				PCI_SLOT(h->devid),
+				PCI_FUNC(h->devid),
+				h->cap_ptr+MMIO_RANGE_OFFSET);
 
-	return 0;
+	return PCI_DEVID(MMIO_GET_BUS(range), MMIO_GET_FD(range));
+}
+
+/*
+ * This function reads the last device id the IOMMU has to handle from the PCI
+ * capability header for this IOMMU
+ */
+static int __init find_last_devid_on_pci(struct ivhd_header *h)
+{
+	u32 range;
+
+	range = read_pci_config(PCI_BUS_NUM(h->devid),
+				PCI_SLOT(h->devid),
+				PCI_FUNC(h->devid),
+				h->cap_ptr+MMIO_RANGE_OFFSET);
+
+	return PCI_DEVID(MMIO_GET_BUS(range), MMIO_GET_LD(range));
 }
 
 /*
@@ -430,15 +448,14 @@ static int __init find_last_devid_from_ivhd(struct ivhd_header *h)
 {
 	u8 *p = (void *)h, *end = (void *)h;
 	struct ivhd_entry *dev;
+	u16 devid;
+
+	devid = find_last_devid_on_pci(h);
+	update_last_devid(devid);
 
 	p += sizeof(*h);
 	end += h->length;
 
-	find_last_devid_on_pci(PCI_BUS_NUM(h->devid),
-			PCI_SLOT(h->devid),
-			PCI_FUNC(h->devid),
-			h->cap_ptr);
-
 	while (p < end) {
 		dev = (struct ivhd_entry *)p;
 		switch (dev->type) {
-- 
2.4.0

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#1231895 — [PATCH 03/10] iommu/amd: Get the first/last device of iommu earlier

FromBaoquan He <bhe@redhat.com>
Date2015-09-24 08:50 +0200
Subject[PATCH 03/10] iommu/amd: Get the first/last device of iommu earlier
Message-ID<qc8vU-3GJ-15@gated-at.bofh.it>
In reply to#1231886
iommu->first_device/last_device are needed by function init_iommu_from_acpi()
and init_iommu_devices(). So putting the assignment of them in iommu_init_pci()
could be late. In this patch put them earlier.

Signed-off-by: Baoquan He <bhe@redhat.com>
---
 drivers/iommu/amd_iommu_init.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index be20a56..5845918 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -1115,6 +1115,9 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
 	iommu->pci_seg = h->pci_seg;
 	iommu->mmio_phys = h->mmio_phys;
 
+	iommu->first_device = find_first_devid_on_pci(h);
+	iommu->last_device = find_last_devid_on_pci(h);
+
 	/* Check if IVHD EFR contains proper max banks/counters */
 	if ((h->efr != 0) &&
 	    ((h->efr & (0xF << 13)) != 0) &&
@@ -1276,16 +1279,9 @@ static int iommu_init_pci(struct amd_iommu *iommu)
 
 	pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET,
 			      &iommu->cap);
-	pci_read_config_dword(iommu->dev, cap_ptr + MMIO_RANGE_OFFSET,
-			      &range);
 	pci_read_config_dword(iommu->dev, cap_ptr + MMIO_MISC_OFFSET,
 			      &misc);
 
-	iommu->first_device = PCI_DEVID(MMIO_GET_BUS(range),
-					 MMIO_GET_FD(range));
-	iommu->last_device = PCI_DEVID(MMIO_GET_BUS(range),
-					MMIO_GET_LD(range));
-
 	if (!(iommu->cap & (1 << IOMMU_CAP_IOTLB)))
 		amd_iommu_iotlb_sup = false;
 
-- 
2.4.0

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