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[PATCH 0/5] CM error report fixes

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  [PATCH 0/5] CM error report fixes Paul Burton <paul.burton@imgtec.com> - 2015-09-22 19:30 +0200
    [PATCH 4/5] MIPS: allow read64 GCR accessors to work on MIPS32 kernels Paul Burton <paul.burton@imgtec.com> - 2015-09-22 19:30 +0200
    [PATCH 3/5] MIPS: avoid buffer overrun in mips_cm_error_report Paul Burton <paul.burton@imgtec.com> - 2015-09-22 19:30 +0200

#1230530 — [PATCH 0/5] CM error report fixes

This series fixes a few problems with support for the CM, in particular
relating to CM3 which has a 64 bit interface to the core. These issues
prevented reporting of CM errors (useful debug output when tracking the
source of a bus error) in some situations, and could cause further
exceptions.

Paul Burton (5):
  MIPS: clarify mips_cm_is64 documentation
  MIPS: don't read GCRs when a CM is not present
  MIPS: avoid buffer overrun in mips_cm_error_report
  MIPS: allow read64 GCR accessors to work on MIPS32 kernels
  MIPS: always read full 64 bit CM error GCRs for CM3

 arch/mips/include/asm/mips-cm.h | 27 ++++++++++++----
 arch/mips/kernel/mips-cm.c      | 71 ++++++++++++++++++++++-------------------
 2 files changed, 59 insertions(+), 39 deletions(-)

-- 
2.5.3

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#1230532 — [PATCH 4/5] MIPS: allow read64 GCR accessors to work on MIPS32 kernels

If we run a MIPS32 kernel on a system using CM3 we may still need to
access 64 bit GCRs, as will be done in later patches. Allow this by
having the read64_gcr_* accessor functions perform 2 x 32 bit reads on
those systems.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/include/asm/mips-cm.h | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index 2a70b76..b9df4b2 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -125,7 +125,17 @@ static inline u32 read32_gcr_##name(void)			\
 								\
 static inline u64 read64_gcr_##name(void)			\
 {								\
-	return __raw_readq(addr_gcr_##name());			\
+	void __iomem *addr = addr_gcr_##name();			\
+	u64 ret;						\
+								\
+	if (mips_cm_is64) {					\
+		ret = __raw_readq(addr);			\
+	} else {						\
+		ret = __raw_readl(addr);			\
+		ret |= (u64)__raw_readl(addr + 0x4) << 32;	\
+	}							\
+								\
+	return ret;						\
 }								\
 								\
 static inline unsigned long read_gcr_##name(void)		\
-- 
2.5.3

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#1230534 — [PATCH 3/5] MIPS: avoid buffer overrun in mips_cm_error_report

Commit 3885c2b463f6 ("MIPS: CM: Add support for reporting CM cache
errors") added cases for decoding errors reported by CM3, but leaves the
buf variable which is printed as a string uninitialised for cause values
other than 1, 2 or 3. Fix by ensuring the buf variable is initialised to
an empty string in such cases.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/kernel/mips-cm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c
index 10524ce..88a8e21 100644
--- a/arch/mips/kernel/mips-cm.c
+++ b/arch/mips/kernel/mips-cm.c
@@ -366,6 +366,8 @@ void mips_cm_error_report(void)
 				 cm3_cmd_group[cmd_group_bits],
 				 cm3_cca_bits, 1 << mcp_bits,
 				 cm3_tr[cm3_tr_bits], sched_bit);
+		} else {
+			buf[0] = 0;
 		}
 
 		pr_err("CM_ERROR=%llx %s <%s>\n", cm_error,
-- 
2.5.3

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