Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1228280 > unrolled thread
| Started by | Ray Jui <rjui@broadcom.com> |
|---|---|
| First post | 2015-09-18 23:30 +0200 |
| Last post | 2015-09-19 00:20 +0200 |
| Articles | 3 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
[PATCH v2 5/9] ARM: dts: Move all Cygnus peripherals into soc bus Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
Re: [PATCH v2 5/9] ARM: dts: Move all Cygnus peripherals into soc bus Arnd Bergmann <arnd@arndb.de> - 2015-09-18 23:40 +0200
Re: [PATCH v2 5/9] ARM: dts: Move all Cygnus peripherals into soc bus Ray Jui <rjui@broadcom.com> - 2015-09-19 00:20 +0200
| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 5/9] ARM: dts: Move all Cygnus peripherals into soc bus |
| Message-ID | <qaboe-67e-5@gated-at.bofh.it> |
Move all Cygnus peripherals to be under the "soc" bus node of type
"simple-bus"
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 275 +++++++++++++++++++-------------------
1 file changed, 138 insertions(+), 137 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index d4e2d04..3d29b77 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -88,171 +88,172 @@
};
};
- pinctrl: pinctrl@0x0301d0c8 {
- compatible = "brcm,cygnus-pinmux";
- reg = <0x0301d0c8 0x30>,
- <0x0301d24c 0x2c>;
- };
+ soc {
+ compatible = "simple-bus";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
- gpio_crmu: gpio@03024800 {
- compatible = "brcm,cygnus-crmu-gpio";
- reg = <0x03024800 0x50>,
- <0x03024008 0x18>;
- #gpio-cells = <2>;
- gpio-controller;
- };
+ pinctrl: pinctrl@0301d0c8 {
+ compatible = "brcm,cygnus-pinmux";
+ reg = <0x0301d0c8 0x30>,
+ <0x0301d24c 0x2c>;
+ };
- gpio_ccm: gpio@1800a000 {
- compatible = "brcm,cygnus-ccm-gpio";
- reg = <0x1800a000 0x50>,
- <0x0301d164 0x20>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- };
+ gpio_crmu: gpio@03024800 {
+ compatible = "brcm,cygnus-crmu-gpio";
+ reg = <0x03024800 0x50>,
+ <0x03024008 0x18>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
- gpio_asiu: gpio@180a5000 {
- compatible = "brcm,cygnus-asiu-gpio";
- reg = <0x180a5000 0x668>;
- #gpio-cells = <2>;
- gpio-controller;
+ gpio_ccm: gpio@1800a000 {
+ compatible = "brcm,cygnus-ccm-gpio";
+ reg = <0x1800a000 0x50>,
+ <0x0301d164 0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
- pinmux = <&pinctrl>;
+ gpio_asiu: gpio@180a5000 {
+ compatible = "brcm,cygnus-asiu-gpio";
+ reg = <0x180a5000 0x668>;
+ #gpio-cells = <2>;
+ gpio-controller;
- interrupt-controller;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- };
+ pinmux = <&pinctrl>;
- amba {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "arm,amba-bus", "simple-bus";
- interrupt-parent = <&gic>;
- ranges;
+ interrupt-controller;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ };
- wdt@18009000 {
- compatible = "arm,sp805" , "arm,primecell";
- reg = <0x18009000 0x1000>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&axi81_clk>;
- clock-names = "apb_pclk";
+ wdt0: wdt@18009000 {
+ compatible = "arm,sp805" , "arm,primecell";
+ reg = <0x18009000 0x1000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&axi81_clk>;
+ clock-names = "apb_pclk";
};
- };
- i2c0: i2c@18008000 {
- compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
- reg = <0x18008000 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
- clock-frequency = <100000>;
- status = "disabled";
- };
+ i2c0: i2c@18008000 {
+ compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
+ reg = <0x18008000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
- i2c1: i2c@1800b000 {
- compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
- reg = <0x1800b000 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
- clock-frequency = <100000>;
- status = "disabled";
- };
+ i2c1: i2c@1800b000 {
+ compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
+ reg = <0x1800b000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
- pcie0: pcie@18012000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x18012000 0x1000>;
+ pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18012000 0x1000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
- linux,pci-domain = <0>;
+ linux,pci-domain = <0>;
- bus-range = <0x00 0xff>;
+ bus-range = <0x00 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
- status = "disabled";
- };
+ status = "disabled";
+ };
- pcie1: pcie@18013000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x18013000 0x1000>;
+ pcie1: pcie@18013000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18013000 0x1000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
- linux,pci-domain = <1>;
+ linux,pci-domain = <1>;
- bus-range = <0x00 0xff>;
+ bus-range = <0x00 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
- status = "disabled";
- };
+ status = "disabled";
+ };
- uart0: serial@18020000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x18020000 0x100>;
- reg-shift = <2>;
- reg-io-width = <4>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&axi81_clk>;
- clock-frequency = <100000000>;
- status = "disabled";
- };
+ uart0: serial@18020000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x18020000 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&axi81_clk>;
+ clock-frequency = <100000000>;
+ status = "disabled";
+ };
- uart1: serial@18021000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x18021000 0x100>;
- reg-shift = <2>;
- reg-io-width = <4>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&axi81_clk>;
- clock-frequency = <100000000>;
- status = "disabled";
- };
+ uart1: serial@18021000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x18021000 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&axi81_clk>;
+ clock-frequency = <100000000>;
+ status = "disabled";
+ };
- uart2: serial@18022000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x18020000 0x100>;
- reg-shift = <2>;
- reg-io-width = <4>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&axi81_clk>;
- clock-frequency = <100000000>;
- status = "disabled";
- };
+ uart2: serial@18022000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x18020000 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&axi81_clk>;
+ clock-frequency = <100000000>;
+ status = "disabled";
+ };
- uart3: serial@18023000 {
- compatible = "snps,dw-apb-uart";
- reg = <0x18023000 0x100>;
- reg-shift = <2>;
- reg-io-width = <4>;
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&axi81_clk>;
- clock-frequency = <100000000>;
- status = "disabled";
- };
+ uart3: serial@18023000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x18023000 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&axi81_clk>;
+ clock-frequency = <100000000>;
+ status = "disabled";
+ };
- nand: nand@18046000 {
- compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
- reg = <0x18046000 0x600>, <0xf8105408 0x600>, <0x18046f00 0x20>;
- reg-names = "nand", "iproc-idm", "iproc-ext";
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ nand: nand@18046000 {
+ compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1",
+ "brcm,brcmnand";
+ reg = <0x18046000 0x600>, <0xf8105408 0x600>,
+ <0x18046f00 0x20>;
+ reg-names = "nand", "iproc-idm", "iproc-ext";
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- brcm,nand-has-wp;
+ brcm,nand-has-wp;
+ };
};
};
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[toc] | [next] | [standalone]
| From | Arnd Bergmann <arnd@arndb.de> |
|---|---|
| Date | 2015-09-18 23:40 +0200 |
| Message-ID | <qabxT-6k6-17@gated-at.bofh.it> |
| In reply to | #1228280 |
On Friday 18 September 2015 14:24:10 Ray Jui wrote:
> + soc {
> + compatible = "simple-bus";
> + ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + pinctrl: pinctrl@0301d0c8 {
>
Similarly to the core bus, this seems to have address ranges 0x03xxxxxx and
0x18xxxxxx on it, so put those into the ranges.
It probably also makes sense to name the bus according to what kind of
bus (axi, ahb, plb, ...) is used here. If the soc has nested buses
(e.g. an ahb connected to an axi bus,) then model both of them in the DT.
Arnd
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[toc] | [prev] | [next] | [standalone]
| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-19 00:20 +0200 |
| Message-ID | <qacaB-7wO-3@gated-at.bofh.it> |
| In reply to | #1228296 |
On 9/18/2015 2:34 PM, Arnd Bergmann wrote:
> On Friday 18 September 2015 14:24:10 Ray Jui wrote:
>> + soc {
>> + compatible = "simple-bus";
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>
>> + pinctrl: pinctrl@0301d0c8 {
>>
>
> Similarly to the core bus, this seems to have address ranges 0x03xxxxxx and
> 0x18xxxxxx on it, so put those into the ranges.
>
Okay we have an issue here. For whatever reason, the Cygnus ASIC team
decided to put registers for the same block in random locations. We see
similar issues in all of our other iProc based SoCs. We have
communicated this to our ASIC team, and hopefully they can revert the
trend for the next SoC.
For example, the gpio_ccm has registers in the following regions:
gpio_ccm: gpio@1800a000 {
compatible = "brcm,cygnus-ccm-gpio";
reg = <0x1800a000 0x50>,
<0x0301d164 0x20>;
NAND is worse, it has registers in 3 different separate regions:
nand: nand@18046000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1",
"brcm,brcmnand";
reg = <0x18046000 0x600>, <0xf8105408 0x600>,
<0x18046f00 0x20>;
As you can see, this makes it impossible to define a proper address
range for the bus; therefore, I'll have to keep the ranges undefined and
a simple 1:1 mapping under this bus.
> It probably also makes sense to name the bus according to what kind of
> bus (axi, ahb, plb, ...) is used here. If the soc has nested buses
> (e.g. an ahb connected to an axi bus,) then model both of them in the DT.
Based on the block diagram from the ASIC team, it looks like all of them
are connected to one major AXI fabric. I can rename the bus to AXI.
>
> Arnd
>
Thanks,
Ray
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web